Patents by Inventor Tena M. Hochard

Tena M. Hochard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for providing a high speed interconnect system with reduced crosstalk
    Patent number: 10925151
    Abstract: Systems and methods for providing a PWB. The methods comprise: forming a Core Substrate (“CS”) a First Via (“FV”) formed therethrough; disposing a First Trace (“FT”) on an exposed surface of CS that is in electrical contact with FV; laminating a first HDI substrate to CS such that FT electrically connects FV via with a Second Via (“SV”) formed through the first HDI substrate; disposing a Second Trace (“ST”) on an exposed surface of the first HDI substrate that is in electrical contact with SV; and laminating a second HDI substrate to the first HDI substrate such that ST electrically connects SV to a Third Via (“TV”) formed through the second HDI substrate. SV comprises a buried via with a central axis spatially offset from central axis of FV and SV. FV and SV have diameters which are smaller than TV's diameter.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: February 16, 2021
    Assignee: EAGLE TECHNOLOGY, LLC
    Inventors: Michael T. DeRoy, Marvin D. Miller, Andres M. Gonzalez, David Cure, Tena M. Hochard
  • SYSTEMS AND METHODS FOR PROVIDING A HIGH SPEED INTERCONNECT SYSTEM WITH REDUCED CROSSTALK
    Publication number: 20200146139
    Abstract: Systems and methods for providing a PWB. The methods comprise: forming a Core Substrate (“CS”) a First Via (“FV”) formed therethrough; disposing a First Trace (“FT”) on an exposed surface of CS that is in electrical contact with FV; laminating a first HDI substrate to CS such that FT electrically connects FV via with a Second Via (“SV”) formed through the first HDI substrate; disposing a Second Trace (“ST”) on an exposed surface of the first HDI substrate that is in electrical contact with SV; and laminating a second HDI substrate to the first HDI substrate such that ST electrically connects SV to a Third Via (“TV”) formed through the second HDI substrate. SV comprises a buried via with a central axis spatially offset from central axis of FV and SV. FV and SV have diameters which are smaller than TV's diameter.
    Type: Application
    Filed: December 23, 2019
    Publication date: May 7, 2020
    Inventors: Michael T. DeRoy, Marvin D. Miller, Andres M. Gonzalez, David Cure, Tena M. Hochard
  • Systems and methods for providing a high speed interconnect system with reduced crosstalk
    Patent number: 10517167
    Abstract: Systems and methods for providing a PWB. The methods comprise: forming a Core Substrate (“CS”) a First Via (“FV”) formed therethrough; disposing a First Trace (“FT”) on an exposed surface of CS that is in electrical contact with FV; laminating a first HDI substrate to CS such that FT electrically connects FV via with a Second Via (“SV”) formed through the first HDI substrate; disposing a Second Trace (“ST”) on an exposed surface of the first HDI substrate that is in electrical contact with SV; and laminating a second HDI substrate to the first HDI substrate such that ST electrically connects SV to a Third Via (“TV”) formed through the second HDI substrate. SV comprises a buried via with a central axis spatially offset from central axis of FV and SV. FV and SV have diameters which are smaller than TV's diameter.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: December 24, 2019
    Assignee: Eagle Technology, LLC
    Inventors: Michael T. DeRoy, Marvin D. Miller, Andres M. Gonzalez, David Cure, Tena M. Hochard