Patents by Inventor Teong Ming Cheah

Teong Ming Cheah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6954914
    Abstract: The present application describes various embodiments of a method and an apparatus for determining electromigration risks for signal nets in integrated circuits. A model for each one of the global nets connecting various circuit blocks in an integrated circuit is created using circuit blocks' timing model and detailed standard parasitic format representation (DSPF) of each global net. The final layout of the integrated circuit is not necessary to determine the electromigration risks. The models can be generated during the early stages of the design cycle once the DSPF of the global nets is available.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: October 11, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Shyam Sundar, Aveek Sarkar, Peter F. Lai, Rambabu Pyapali, Teong Ming Cheah
  • Publication number: 20040194043
    Abstract: The present application describes various embodiments of a method and an apparatus for determining electromigration risks for signal nets in integrated circuits. A model for each one of the global nets connecting various circuit blocks in an integrated circuit is created using circuit blocks' timing model and detailed standard parasitic format representation (DSPF) of each global net. The final layout of the integrated circuit is not necessary to determine the electromigration risks. The models can be generated during the early stages of the design cycle once the DSPF of the global nets is available.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 30, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Shyam Sundar, Aveek Sarkar, Peter F. Lai, Rambabu Pyapali, Teong Ming Cheah