Patents by Inventor Teppai Hirotsu

Teppai Hirotsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070124559
    Abstract: A microcontroller in which an increase in hardware is suppressed and data correction capability for software error of RAM can be improved is provided. A microcontroller which performs processing according to a program includes a CPU and a RAM for storing data processed by the CPU, wherein multiplexed regions are defined in the RAM, and when these regions are accessed, an access to an address outputted by the CPU and a copy access to an address obtained by adding or subtracting a certain value to or from the address outputted by the CPU are performed. By this means, the same data can be stored in a plurality of regions and the reliability can be improved.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 31, 2007
    Inventors: Hiromichi Yamada, Teppai Hirotsu, Teruaki Sakata, Takeshi Kataoka, Shunichi Iwata