Abstract: The invention relates to a method for cascading two or more feedforward-type sigma-delta modulators, and a modulator system comprising at least two cascaded modulators (1, 2). According to the invention, each subsequent modulator (2) in the cascade quantizes the integrated signal estimate error (e) of the preceding modulator (1), the quantized error (e') is differentiated (3) and subtracted (6) from the quantized output signal (D") of the preceding modulator (1).

Abstract: The invention relates to a method and an arrangement for stabilizing a high-order sigma-delta modulator comprising at least two integrator stages and a quantizing means. The first, the first two or the first three integrator stages of the high-order modulator form a low-order modulator which is stable at all input signal values. The arrangement comprises a means for resetting the integrator stages following the low-order modulator when the stable operation range of the high-order modulator is exceeded. For an MF modulator the arrangement further comprises a coupling means for decoupling the output of the last integrator of the high-order modulator from the quantizing means and for coupling the output of said low-order modulator to the quantizing means simultaneously with the resetting.

Abstract: The invention relates to a digital sigma-delta modulator for a D/A converter, comprising an integration stage or several cascaded integration stages and a feedback circuit for feedbacking the sign of the output signal of the last integration stage, delayed by one clock cycle and multiplied by a predetermined scaling coefficient, to each integration stage. To avoid limit cycle oscillation, the state of at least the least significant free bit in at least one integration stage is variable at random.