Abstract: Relocation and/or replacement of terminal apparatus in telecommunications systems including, but not necessarily limited to, key telephone systems, usually entails reassignment of administration data; for example, features. When a station or terminal apparatus is moved physically from one port to another within a telecommunications system which comprises a plurality of ports connected to a central processor, interface means operative on initial connection of said terminal apparatus transmits to the central processor an identifier unique to such terminal apparatus within such system. The central processing means has storage for each said identifier together with administration data specific to said terminal apparatus and the number of the port to which said terminal apparatus set is connected. Following receipt of an identifier, the central processor updates said storage means to assign said administration data corresponding to said identifier to the present port.

Abstract: In a loudspeaker telephone, improved power transfer is achieved by connecting the drive circuit for the loudspeaker in parallel with the input and output of the usual series regulator, the output of the regulator and one of the power supply connections of the drive circuit being connected, in common, to supply other circuitry in the telephone set. This other circuitry might comprise a microprocessor and other signal processing circuitry. Such a configuration means that the current passing through the speaker drive circuit also passes through the other circuitry. In effect, it is "re-used" instead of being added, as would be the case if the drive circuit were connected in parallel with the other circuitry. In the case of a positive series regulator, the series regulator supplies current when the current requirement of the other circuitry exceeds that received from the drive circuit.

Abstract: A key telephone system includes a plurality of ports being linked by port associated bidirectional communication channels which are synchronously switched by transferring bit states between ones of the channels to provide communication paths between the ports as directed by a central processor. The ports are also linkable to and via the central processor by port associated message channels. An interface circuit is responsive to the central processor and message channel signals for regulating flow of messages received by the central processor and for effecting single and plural channel distribution of messages from the central processor. The message channels permit telephony operating features and functions to be provided either within the central processor or by appropriate apparatus means being connected at any of the ports.

Abstract: A stream of high-speed bipolar signals transmitted along standard twisted pair telephone wiring are detected by a circuit that includes a pair of differential amplifiers each having a signal input connected directly to one conductor of the twisted pair and a reference input connected through a peak voltage detector to the opposite conductor. The amplifiers function as an input signal comparator which generates a corresponding bit stream of logical ones in response to the bipolar signals that exceed 50% of the average peak voltage input. A threshold bias voltage corresponding to positive going signals on each conductor is generated by the detector and charges separate capacitors that connect each reference input to its conductor. The bias voltage and bipolar signals input to each amplifier are algebraically summed which doubles the differential input signal and results in an increased signal to noise ratio of about six decibels.

Abstract: A variable oscillator, suitable for integration as part of a phase lock loop (PLL) clock source in a complementary metal oxide semiconductor (CMOS) integrated circuit, includes an amplifier and terminals for connection to a tank circuit, for example a crystal resonator. Capacitors are alternately coupled and decoupled in relation to the amplifier to cause oscillatory operation at lower and higher frequencies. In the CMOS circuit the reactance is conveniently provided by conductive layers of predetermined dimensions being carried by an oxide layer. Each layer provides a capacitive reactance which is arranged in series with a field effect device being controlled by associated PLL control circuitry. The control circuit includes a strobe generator for strobing a phase detector in response to a data signal received by an associated receiver. Each time the phase detector is strobed it registers one of an early or late phase indication. The phase indication is used to control the field effect devices.

Abstract: A TDM PCM telephone system and a telephone user terminal are interconnected by a digital subscriber loop circuit which provides at least a single channel communication path for digital signals of data or encoded voice origin. The digital subscriber loop circuit includes transmit and receive paths and a line interface circuit. The line interface circuit converts a selected channel of binary signals appearing at a subscriber line port of the telephone system into a corresponding bipolar return to zero (BPRZ) signals for transmission on the receive signal path. The line interface circuit also converts BPRZ signals from the transmit signal path to corresponding binary signals. These binary signals are accumulated and stored. At a time coincident with the selected channel occurrence, the line interface circuit transmits the stored signals to the subscriber line port for acceptance by the telephone system.