Patents by Inventor Teri L. Tu

Teri L. Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6232768
    Abstract: A magnetic-field-to-voltage transducer includes a Hall element and a digitally gain-controlled Hall-voltage amplifier that produces an analog voltage Vsig having excursions of one polarity corresponding to the passing of magnetic articles. Vsig is applied to the input of a peak-referenced-threshold signal detector that generates a binary proximity-detector output voltage, Vout, having transitions of one direction upon approaches of gear teeth down to zero speed. A digitally gain-controlled amplifier is connected to the Hall element. A comparator circuit generates a binary signal Vbig (or Vtoobig) that changes from one to another binary level each time that Vsig exceeds a DC target voltage, VTG. The AGC circuit incrementally changes the transducer gain in the direction to bring the peaks in Vsig to just below the target value TTG. Reference voltages VP2 and VN2 are generated that are equal respectively to the most recent peak positive and negative going excursion in Vsig.
    Type: Grant
    Filed: May 7, 1997
    Date of Patent: May 15, 2001
    Assignee: Allegro Microsystems Inc.
    Inventors: Kristann L. Moody, Ravi Vig, P. Karl Scheller, Jay M. Towne, Teri L. Tu
  • Patent number: 6091239
    Abstract: A detector for detecting passing magnetic articles including a magnetic-field-to-voltage transducer having an output at which an analog voltage Vsig is generated, with the Vsig voltage being commensurate to the strength of the ambient magnetic field and having at least one peak. An analog-to-digital converter coupled to the output of the transducer is operative to convert to a corresponding digital signal at least a portion of the Vsig voltage, which portion includes the peak and a circuit coupled to the analog-to-digital converter is operative to generate an output signal indicative of the occurrence of the times t.sub.xpk when the difference between Vsig and said peak of Vsig has exceeded a predetermined amount.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: July 18, 2000
    Assignee: Allegro MicroSystems, Inc.
    Inventors: Ravi Vig, Jay M. Towne, Kristann L. Moody, Teri L. Tu
  • Patent number: 5781005
    Abstract: A Hall-effect sensor is presented which is adapted to sense a ferromagnetic object, including an integrated circuit chip having a planar Hall element which is positioned in, parallel to, and defines a sensor plane having a front side and a back side, and which element is normal to and centered on a sensor axis, and a magnet structure having an N pole and an S pole, the magnet structure being positioned behind the sensor plane and positioned so that an S pole and an N pole are adjacent each other and both are adjacent the element.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 14, 1998
    Assignee: Allegro Microsystems, Inc.
    Inventors: Ravi Vig, Teri L. Tu
  • Patent number: 5729130
    Abstract: In a proximity-detector, a Hall transducer produces a signal Vsig. Two counters, P-counter and N-counter count pulses from a clock and produce count signals respectively to two DACs, PDAC and NDAC. The DACs output signals track and hold, respectively, the positive pulses and negative pulses in Vsig. These output signals are compared with Vsig to produce a proximity-detector binary output voltage Vout that becomes high when a tracking voltage V.sub.DAC-P produced by PDAC rises to each peak positive voltage V.sub.pk in Vsig, and that becomes low when a tracking voltage V.sub.DAC-P falls to each peak negative voltage in Vsig. The peak V.sub.DAC-P is held until Vsig drops by a fixed amount below V.sub.pk to produce an output pulse that resets the counter connected to PDAC at a time shortly following the actual peak in Vsig. Similarly, the peak V.sub.DAC-N is held until Vsig rises a fixed amount above V.sub.DAC-N to produce an output pulse that resets the counter connected to NDAC. The N-counter is reset at t.sub.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: March 17, 1998
    Inventors: Kristann L. Moody, Ravi Vig, Jay M. Towne, Teri L. Tu
  • Patent number: 5694038
    Abstract: A magnetic-field-to-voltage transducer includes a Hall element and a digitally gain-controlled Hall-voltage amplifier that produces an analog voltage Vsig having excursions of one polarity corresponding to the passing of magnetic articles. Vsig is applied to the input of a signal-manipulating circuit that generates a proximity- detector binary output voltage, Vout, having transitions of one direction each time a predetermined point is reached in Vsig. A digitally gain-controlled gain amplifier is connected to the Hall element. A comparator circuit generates a binary signal Vbig (or V.sub.toobig) that changes from one to another binary level each time that Vsig exceeds a DC target voltage, V.sub.TG.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: December 2, 1997
    Assignee: Allegro Microsystems, Inc.
    Inventors: Kristann L. Moody, Ravi Vig, P. Karl Scheller, Jay M. Towne, Teri L. Tu
  • Patent number: 5650719
    Abstract: A Hall transducer produces a signal Vsig. Threshold voltages V.sub.Pth and V.sub.Nth are generated at the beginning, t.sub.update, of each of a succession of update time intervals, of 64 pulses in Vsig, to be fixed percentages respectively of the peak to peak voltage in Vsig. A proximity-detector binary output voltage is high when Vsig exceeds threshold voltage V.sub.Pth and low when Vsig is below threshold voltage V.sub.Nth. Signals V.sub.Pold and V.sub.Nold, generated by first and second DACs, are equal to the first positive and negative peaks in Vsig after each time t.sub.update initiating the start of a successive interval. Signals V.sub.Pnew and V.sub.Nnew, simultaneously generated by third and fourth DACs, are equal to the greatest positive and negative peak voltages in Vsig during the interval ending at t.sub.update. Counters present their count to the first and second DACs that count pulses from a clock for tracking and holding +/- peaks in Vsig. After each time t.sub.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: July 22, 1997
    Assignee: Allegro Microsystems, Inc.
    Inventors: Kristann L. Moody, Ravi Vig, P. Karl Scheller, Jay M. Towne, Teri L. Tu