Patents by Inventor Terrence A. Smith

Terrence A. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7018703
    Abstract: Provided are thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. Finishing methods for treating unfinished thin-laminate panels into finished thin-laminate panels assure that the edges of the dielectric layer of the panel are substantially free of conductive material.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: March 28, 2006
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Arthur J. Fillion, Osamu Kogami, Terrence A. Smith
  • Publication number: 20040264106
    Abstract: Provided are thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. Finishing methods for treating unfinished thin-laminate panels into finished thin-laminate panels assure that the edges of the dielectric layer of the panel are substantially free of conductive material.
    Type: Application
    Filed: July 28, 2004
    Publication date: December 30, 2004
    Applicant: Matsushita Electronic Materials, Inc.
    Inventors: Arthur J. Fillion, Osamu Kogami, Terrence A. Smith
  • Patent number: 6789298
    Abstract: Provided are thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. Finishing methods for treating unfinished thin-laminate panels into finished thin-laminate panels assure that the edges of the dielectric layer of the panel are substantially free of conductive material.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: September 14, 2004
    Assignee: Matsushita Electronic Materials, Inc.
    Inventors: Arthur J. Fillion, Osamu Kogami, Kanji Kurata, Jeffrey A. Murray, Terrence A. Smith
  • Patent number: 6783620
    Abstract: The present invention provides thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. The thin-laminate panels of the present invention may be tested for manufacturing defects, such as short circuits, before further processing of the panels to produce PCBs. “Finishing” methods for shearing sheets of unfinished thin-laminate into the finished thin-laminate panels of the present invention in a manner that does not cause smearing of the conductive material onto the dielectric layer are also provided.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: August 31, 2004
    Assignee: Matsushita Electronic Materials, Inc.
    Inventors: Terrence A. Smith, Howard R. Elliott
  • Patent number: 6114015
    Abstract: The present invention provides thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. The thin-laminate panels of the present invention may be tested for manufacturing defects, such as short circuits, before further processing of the panels to produce PCBs. "Finishing" methods for shearing sheets of unfinished thin-laminate into the finished thin-laminate panels of the present invention in a manner that does not cause smearing of the conductive material onto the dielectric layer are also provided.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: September 5, 2000
    Assignee: Matsushita Electronic Materials, Inc.
    Inventors: Arthur J. Fillion, Osamu Kogami, Kanji Kurata, Jeffrey A. Murray, Terrence A. Smith