Abstract: Methods, systems, and articles of manufacture consistent with the present invention optimize allocation of items to a stack memory instead of a heap memory. It is determined whether an item to be placed on the heap memory escapes from the scope of the item's allocator, and whether the item survives the item's allocator. The item is allocated to the stack memory responsive to the item not escaping from the scope of the item's allocator and not surviving the item's allocator.

Abstract: Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One stack traceback technique includes performing the following two steps for each virtual address at which a function call in the call chain is made: (1) locating the tag section whose virtual address range includes the virtual address; and (2) locating a tag in the tag section found in step (1), whose virtual address range includes the virtual address. The tag found in step (2) indicates which of the values, if any, respectively held by the non-volatile registers upon entry to the particular function in which the above function call is made, are stored in a stack frame for the particular function at the time of the function call.

Abstract: This Continuation-In-Part describes a part of this run-time debugger operation which is designated the "Fix-and-Continue" invention. This invention permits a user to begin a debugging session wherein if an error in the code is encountered, the user can edit the corresponding source code to correct the error and then execute a "Fix and Continue" command all without leaving the debugging session. The Fix and Continue code calls the compiler to recompile the source code file with the edited text in it, receives the resulting recompiled object code file from the compiler, uses the dynamic linker to link the recompiled object code into the target application program process, patches the previous version of this same object code fie to refer to the newly recompiled code, resets any required variables and registers, resets the program counter to the line of code being executed when the error was discovered.

Abstract: In a computer system having a hierarchical file structure, a file system is provided which permits users of the system to share a file hierarchy and also have a private hierarchy in which files are automatically copied to as they are modified. Through the system of the present invention, a directory appears to the user as a single directory but may actually comprise files originating from a number of directories which are connected to one another through search links. Each directory has a search link associated with it which contains the path name of the back layer or directory behind it. The first layer seen through the system of the present invention is the front layer, private to the user. The back layers behind the front layer and connected to the front layer through the search links are shared layers accessible to multiple users. Thus transparent to the user of the directory accessible comprises multiple layers comprising shared and private files.

Abstract: In a computer device in accordance with the preferred embodiment of the invention, an instruction set which uses a two-instruction sequence to store the result of a comparison is provided. The two-instruction sequence, which uses no branch instructions, does not need to wait for condition resolution before storing conditional results. Additionally, it also is capable of implementing slightly more general operations than simply storing a zero or one value of a comparison. Basically, the instruction set in accordance with the invention compares two operands and unconditionally stores a zero, which represents a Boolean "false", into a selected destination. The instruction set then conditionally nullifies the instruction following it, thus effecting a highly efficient execution of a sequence of instructions compared to the prior art.

Abstract: A low overhead way for insuring that only routines of sufficient privilege can execute on a secured page of memory in an hierarchial computer system, and for raising the privilege level of a low privilege process in an orderly and secure way is presented. This is done through the execution of a single "gateway" branch instruction standing between a procedure call by a lower privileged routine, such as a user program, and an operating system itself.

Abstract: A virtual memory system is used to control access to I/O device address space in accordance with a preferred embodiment of the present invention. In a virtual memory system, access to pages within a processor's address space are assigned to each application program. Each I/O device is assigned two pages of address space. One page is considered to be privileged, and the other unprivileged. Each I/O device register is associated with an address in each of the two pages of its I/O device address space. Address space is global. What is meant by global is that physical memory locations map to the same virtual memory space regardless of what process is running on the processor. Access codes accompanied by a write disable bit are used to control process access to various addresses.

Abstract: In a computer device, an instruction set which uses a two-instruction sequence to store the result of a comparison is provided. The two-instruction sequence, which uses no branch instructions, does not need to wait for condition resolution before storing conditional results. Additionally, it also is capable of implementing slightly more general operations than simply storing a zero or one value of a comparison. Basically, the instruction set in accordance with the invention compares two operands and unconditionally stores a zero, which represents a Boolean "false", into a selected destination. The instruction set then conditionally nullifies the instruction following it, thus effecting a highly efficient execution of a sequence of instructions compared to the prior art.

Abstract: Apparatus is provided to restore an excess six correct to every digit of an intermediate result which did overflow during the previous addition operation during a sequence of repeated BCD addition operations. A carry register is defined to store and feedback logical signals indicative of the occurance of an overflow event.