Abstract: A diagnostic system is disclosed for detecting malfunctions in the access circuitry utilized to control the reading, writing, and refreshing of a plurality of semiconductor memory modules. More specifically, a pair of access circuits are provided for each module with each access circuit only controlling the accessing of predetermined bits of each word stored in that module. During read, write and refresh operations, the output signals generated by each of the two access circuits for application to the memory elements in that module are "compared" to ensure that the memory elements are being properly accessed. Moreover, even when one memory module is accessed, the output signals of each pair of access circuits in each of the other nonaccessed modules are compared to ensure their continued operability.

Abstract: A diagnostic system is disclosed for detecting malfunctions in the access circuitry utilized to control the reading, writing, and refreshing of a plurality of semiconductor memory modules. More specifically, a pair of access circuits are provided for each module with each access circuit only controlling the accessing of predetermined bits of each word stored in that module. During read or write operations, the output signals generated by each of the two access circuits for application to the memory elements in that module are "compared" to ensure that the memory elements are being properly accessed. During refresh operations, the outputs of each pair of access circuits are also "matched" to ensure the integrity of the refresh operation.