Patents by Inventor Terry G. Ryks

Terry G. Ryks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8974888
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a silane applied to the ends of glass fibers in via holes. In one embodiment, during a plated through-hole (PTH) via fabrication process, glass fiber bundles exposed in a drilled through-hole are selectively sealed. For example, after the through-hole is drilled in a substrate, the substrate may be subjected to an aqueous silane bath (e.g., an organo trialkoxysilane in an aqueous solution of an acid that acts as a catalyst) to deposit a layer of silane on the exposed glass fiber bundle ends. For example, trialkoxy groups of the silane may react with exposed silanols on the glass to form a siloxane, which is further polymerized to form a silane polymer barrier layer on the exposed glass fiber ends. The barrier layer effectively seals the glass fiber bundles and eliminates the conductive anodic filament (CAF) pathway between PTH vias.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: March 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil
  • Patent number: 8528203
    Abstract: An enhanced mechanism for via stub elimination in printed wiring boards (PWBs) and other substrates employs laser resin activation to provide selective via plating. In one embodiment, the resin used in insulator layers of the PWB contains spinel-based non-conductive metal oxide. Preferably, only insulator layers through which vias will pass contain the metal oxide. Those layers are registered and laser irradiated at via formation locations to break down the metal oxide and release metal nuclei. Once these layers are irradiated, all layers of the PWB or subcomposite are laid up and laminated. The resulting composite or subcomposite is subsequently drilled through and subjected to conventional PWB fabrication processes prior to electroless copper plating and subsequent copper electroplating. Because metal nuclei were released only in the via formation locations of the appropriate layers, plating occurs in the via barrels only along those layers and partially plated vias are created without stubs.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: September 10, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil
  • Publication number: 20130052409
    Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a silane applied to the ends of glass fibers in via holes. In one embodiment, during a plated through-hole (PTH) via fabrication process, glass fiber bundles exposed in a drilled through-hole are selectively sealed. For example, after the through-hole is drilled in a substrate, the substrate may be subjected to an aqueous silane bath (e.g., an organo trialkoxysilane in an aqueous solution of an acid that acts as a catalyst) to deposit a layer of silane on the exposed glass fiber bundle ends. For example, trialkoxy groups of the silane may react with exposed silanols on the glass to form a siloxane, which is further polymerized to form a silane polymer barrier layer on the exposed glass fiber ends. The barrier layer effectively seals the glass fiber bundles and eliminates the conductive anodic filament (CAF) pathway between PTH vias.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil
  • Publication number: 20120312589
    Abstract: An enhanced mechanism for via stub elimination in printed wiring boards (PWBs) and other substrates employs laser resin activation to provide selective via plating. In one embodiment, the resin used in insulator layers of the PWB contains spinel-based non-conductive metal oxide. Preferably, only insulator layers through which vias will pass contain the metal oxide. Those layers are registered and laser irradiated at via formation locations to break down the metal oxide and release metal nuclei. Once these layers are irradiated, all layers of the PWB or subcomposite are laid up and laminated. The resulting composite or subcomposite is subsequently drilled through and subjected to conventional PWB fabrication processes prior to electroless copper plating and subsequent copper electroplating. Because metal nuclei were released only in the via formation locations of the appropriate layers, plating occurs in the via barrels only along those layers and partially plated vias are created without stubs.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 13, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory E. Balcome, Brett P. Krull, Joseph Kuczynski, Terry G. Ryks, Timothy J. Tofil