Patents by Inventor Terry Gilton

Terry Gilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060040506
    Abstract: Methods and apparatus for fabricating and cleaning in-process semi-conductor wafers are provided. An in-process wafer is placed within a closed chamber. A reactant gas is incorporated in a liquid solvent to form a “reactant mixture” that is capable of reacting with photoresist material for other material) on a wafer surface to facilitate removal of the material from the wafer surface. The reactant mixture is condensed on one or more of the in-process wafer surfaces to form a thin film on the surface(s) of the wafer. The solvent in the reactant mixture acts as a transport medium to place the reactant gas on the wafer surface. The reactant gas is then able to react with the photoresist material (or other material) on the in-process wafer surface to effect removal the material. Following reaction of the reactant gas with the photoresist, the thin film of reactant mixture is removed from the wafer surface by flash heating, rinsing, draining, or other suitable means.
    Type: Application
    Filed: October 20, 2005
    Publication date: February 23, 2006
    Inventors: Terry Gilton, Li Li
  • Publication number: 20060006421
    Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.
    Type: Application
    Filed: September 7, 2005
    Publication date: January 12, 2006
    Inventors: John Moore, Terry Gilton
  • Publication number: 20060003463
    Abstract: Methods for assaying or isolating constituents of samples include applying a sample to a capillary column, which includes a matrix that includes the same material as a nonporous substrate within which the capillary column is formed, as well as drawing the sample through at least a portion of a length of the capillary column. Migration portions of the sample, such as analytes or other constituents thereof, through the capillary column may be inhibited by a stationary phase on the matrix, such as, but not limited to, capture molecules immobilized to discrete locations of the substrate. The presence of a constituent in a sample may be detected as a result of its interaction with the capillary column or a stationary phase associated with the capillary column.
    Type: Application
    Filed: August 26, 2005
    Publication date: January 5, 2006
    Inventor: Terry Gilton
  • Publication number: 20050282301
    Abstract: Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
    Type: Application
    Filed: August 23, 2005
    Publication date: December 22, 2005
    Inventors: Terry Gilton, Paul Morgan
  • Publication number: 20050266635
    Abstract: The present invention provides a design for a PCRAM element which incorporates multiple metal-containing germanium-selenide glass layers of diverse stoichiometries. The present invention also provides a method of fabricating the disclosed PCRAM structure.
    Type: Application
    Filed: August 3, 2005
    Publication date: December 1, 2005
    Inventors: John Moore, Terry Gilton, Kristy Campbell
  • Publication number: 20050265082
    Abstract: A memory device including a simultaneous read circuit design for multiple memory cells on a single interconnect using a fast fourier transform analysis circuit. The simultaneous read circuit can be used with any memory type storing information as an energy-absorbing state.
    Type: Application
    Filed: January 29, 2004
    Publication date: December 1, 2005
    Inventors: Kristy Campbell, Terry Gilton
  • Publication number: 20050252212
    Abstract: A rotatable micro-machine is comprised of a solvent reservoir, a porous evaporation region and a channel connecting the solvent reservoir to the evaporation region. The evaporation region may be constructed of capillary paths that enable a capillary action which pulls solvent from the channel so as to enable a flow of solvent from the reservoir to the evaporation region through the channel. A rotatable member has portions in communication with the channel so as to be rotated by the flow. In one embodiment, the rotatable member may be a component of a micro-turbine generator. A system may be comprised of the rotatable micro-machine in combination with at least one electrical circuit. The porous region may be positioned to receive heat from the circuit.
    Type: Application
    Filed: May 17, 2004
    Publication date: November 17, 2005
    Inventor: Terry Gilton
  • Publication number: 20050219901
    Abstract: A non-volatile memory cell utilizes a programmable conductor random access memory (PCRAM) structure instead of a polysilicon layer for a floating gate. Instead of storing or removing electrons from a floating gate, the programmable conductor is switched between its low and high resistive states to operate the flash memory cell. The resulting cell can be erased faster and has better endurance than a conventional flash memory cell.
    Type: Application
    Filed: June 3, 2005
    Publication date: October 6, 2005
    Inventor: Terry Gilton
  • Publication number: 20050201146
    Abstract: A method for refreshing PCRAM cells programmed to a low resistance state and entire arrays of PCRAM cells uses a simple refresh scheme which does not require separate control and application of discrete refresh voltages to the PCRAM cells in an array. Specifically, the array structure of a PCRAM device is constructed to allow leakage current to flow through each programmed cell in the array to refresh the programmed state. In one embodiment, the leakage current flows across the access device between the anode of the memory element and the bit line to which the cell is connected, for each memory cell in the array which has been programmed to the low resistance state. In another embodiment, the leakage current flows to the programmed cells through a doped substrate or doped regions of a substrate on which each cell is formed. An entire array is refreshed simultaneously by forming each memory element in the array to have one common anode formed as a single cell plate for the array.
    Type: Application
    Filed: May 13, 2005
    Publication date: September 15, 2005
    Inventors: John Moore, Terry Gilton, Kristy Campbell
  • Publication number: 20050189321
    Abstract: Embodiments in accordance with the present invention provide for removing organic materials from substrates, for example substrates employed in the fabrication of integrated circuits, liquid crystal displays and the like. Such embodiments also provide for forming self-limiting oxide layers on oxidizable materials disposed on such substrates where such materials are exposed to the methods of the present invention. The methods of the present invention provide for contacting substrates with a solution of ozone, water and a surfactant, the solution being effective for removing organic materials and forming self-limiting oxide layers on oxidizable materials.
    Type: Application
    Filed: September 26, 2003
    Publication date: September 1, 2005
    Inventor: Terry Gilton
  • Publication number: 20050167689
    Abstract: A low-volatility or non-volatility memory device utilizing zero field splitting properties to store data. In response to an electrical pulse or a light pulse, in the absence of any externally applied magnetic field, the host material can switch between stable energy-absorbing states based on the zero field splitting properties of the metal ions and the surrounding host material. The invention also includes a device and method for the storage of multiple bits in a single cell using a plurality of metal ion species in a single host material.
    Type: Application
    Filed: January 29, 2004
    Publication date: August 4, 2005
    Inventors: Kristy Campbell, Terry Gilton, John Moore
  • Publication number: 20050157567
    Abstract: A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.
    Type: Application
    Filed: March 16, 2005
    Publication date: July 21, 2005
    Inventor: Terry Gilton
  • Publication number: 20050157573
    Abstract: A method of forming a non-volatile resistance variable device includes forming a first conductive electrode material on a substrate. A metal doped chalcogenide comprising material is formed over the first conductive electrode material. Such comprises the metal and AxBy, where “B” is selected from S, Se and Te and mixtures thereof, and where “A” comprises at least one element which is selected from Group 13, Group 14, Group 15, or Group 17 of the periodic table. In one aspect, the chalcogenide comprising material is exposed to and HNO3 solution. In one aspect the outer surface is oxidized effective to form a layer comprising at least one of an oxide of “A” or an oxide of “B”. In one aspect, a passivating material is formed over the metal doped chalcogenide comprising material. A second conductive electrode material is deposited, and a second conductive electrode material of the device is ultimately formed therefrom.
    Type: Application
    Filed: March 21, 2005
    Publication date: July 21, 2005
    Inventors: Kristy Campbell, Terry Gilton, John Moore, Jiutao Li
  • Publication number: 20050148150
    Abstract: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass layer, formed over a first metal containing layer, formed over a first chalcogenide glass layer. The thin metal containing layer preferably is a silver layer. An electrode may be formed over the thin silver layer. The electrode preferably does not contain silver.
    Type: Application
    Filed: November 16, 2004
    Publication date: July 7, 2005
    Inventors: John Moore, Kristy Campbell, Terry Gilton
  • Publication number: 20050145834
    Abstract: The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.
    Type: Application
    Filed: February 11, 2005
    Publication date: July 7, 2005
    Inventor: Terry Gilton
  • Publication number: 20050133778
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Application
    Filed: January 13, 2005
    Publication date: June 23, 2005
    Inventors: Kristy Campbell, Terry Gilton, John Moore, Joseph Brooks
  • Publication number: 20050122757
    Abstract: An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: John Moore, Terry Gilton
  • Publication number: 20050118831
    Abstract: A method for moving resist stripper across the surface of a semiconductor substrate that includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.
    Type: Application
    Filed: January 13, 2005
    Publication date: June 2, 2005
    Inventor: Terry Gilton
  • Publication number: 20050101084
    Abstract: An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element.
    Type: Application
    Filed: December 6, 2004
    Publication date: May 12, 2005
    Inventor: Terry Gilton
  • Publication number: 20050079451
    Abstract: The invention includes a process whereby a solvent is utilized to remove soluble portions of a resist, and subsequently the solvent can be removed with a gas-fortified liquid. In particular aspects, the gas-fortified liquid emits bubbles during the removal of the solvent. Additionally, the gas-fortified liquid can be utilized to remove residual resist scum, and in such aspects the gas-fortified liquid can emit bubbles during the scum removal.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 14, 2005
    Inventors: Trung Doan, Terry Gilton