Abstract: The present disclosure describes a system with a voltage regulator, a comparator circuit, and a control circuit. The voltage regulator includes an output node and is configured to generate a voltage at the output node. The comparator circuit is configured to compare the voltage at the output node to a reference voltage. The control circuit is configured to disable the voltage regulator after the voltage regulator has generated a charge cycle and for a period of time until the voltage at the output node is below the reference voltage.

Abstract: The present disclosure describes a system with a voltage regulator, a current source circuit, and a control circuit. The voltage regulator has an output node and is configured to provide a supply voltage at the output node. The current source circuit is configured to draw current away from the voltage regulator's output node. And, the control circuit is configured to delay enabling the current source circuit in response to a voltage at the voltage regulator's output node being above a predetermined voltage level and the voltage regulator being disabled. With this arrangement, a voltage ripple at the voltage regulator's output node can be reduced in the presence of a bi-polar load current, which can be advantageous in voltage regulator designs (e.g., in DC-DC converters employing a Pulse Frequency Modulation scheme).

Abstract: A pulse generator circuit in a DC-to-DC converter may be configured to generate pulses that have a frequency that increases in response to increases in the load on the DC-to-DC converter. The pulse generator circuit may be configured to cause each pulse to have a constant width. When the pulse reaches the end of the constant width and the magnitude of the current through an inductance in the converter is less than a threshold value, however, the pulse generator may be configured to extend the pulse until the magnitude of the current through the inductance reaches the threshold value. The pulse generator circuit may be configured to prematurely terminate each pulse if and at such time as the load voltage exceeds a target value by approximately half of the peak-to-peak voltage of the ripple component plus the noise component margin.

Abstract: A pulse generator circuit in a DC-to-DC converter may be configured to generate pulses that have a frequency that increases in response to increases in the load on the DC-to-DC converter. The pulse generator circuit may be configured to cause each pulse to have a constant width. When the pulse reaches the end of the constant width and the magnitude of the current through an inductance in the converter is less than a threshold value, however, the pulse generator may be configured to extend the pulse until the magnitude of the current through the inductance reaches the threshold value. The pulse generator circuit may be configured to prematurely terminate each pulse if and at such time as the load voltage exceeds a target value by approximately half of the peak-to-peak voltage of the ripple component plus the noise component margin.

Abstract: To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism “zeros-out” DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new “switched-to” PWM mode cycle is DC offset-free.

Abstract: A plurality of constant ON-time buck converters are coupled to a common load. The output of each buck converter is coupled to a common load via a series sense resistor. The regulated output voltage across the common load is compared to a reference voltage to generate a start signal. The start signal is alternately coupled to the controller on each buck converter. The ON-time of a master buck converter is terminated when a ramp signal generated from the regulator input voltage exceeds the reference voltage. All other slave converters have an ON-time pulse started by the start signal and stopped by comparing a sense voltage corresponding to their output current during their ON-time pulse to the peak current in the master converter during its ON-time. A counting circuit with an output corresponding to each of the plurality of buck converters is used to select which buck converter receives the start signal.

Abstract: A constant ON-time controller for a buck converter utilizes dual symmetrical ramps. The ramps may be generated artificially or by sensing the voltage across a sense resistor in the output. The ramp may also be generated by sensing the voltage across the “ON” resistance of the low side FET in the switching regulator. A modified output voltage has one of the ramps superimposed and a modified reference voltage has the other ramps superimposed. The modified output voltage and the modified reference voltage are compared to determine when to start the ON-time of the buck converter. The dual ramps reduce, noise susceptibility. The ON-time is stopped in response to charging a capacitor with the regulator input voltage. An offset may also be generated representing the difference between the average output voltage and the reference voltage. The offset is used to generate a modified reference to compensate for the offset.

Abstract: A compensated reference voltage for the controller of a buck regulator corrects for offsets and controls the rate at which the output load current can change in response to a change in the reference setting output voltage level of the buck converter. A current source is coupled to a resistor that has one terminal connected to the ground potential of the output voltage. The voltage across this resistor generates a remote reference voltage. A feedback current is generated as a function of the difference between the remote reference voltage and the output voltage. The feedback current is time integrated to form the compensated reference, which is used to control the ON-time of the buck converter.

Abstract: A system and method provides virtual ripple signal generation for use in voltage regulation applications. Some switch-mode power converters or voltage regulators use output signal ripple to effect voltage regulation. A virtual ripple generator provides this type of voltage regulator with a virtual ripple signal comprising an offset component responsive to actual load voltage, but with a generated AC ripple component of arbitrary magnitude that is independent of actual output signal ripple. Unlike the actual output ripple signal, the generated AC ripple component is not dependent on implementation specifics, such as circuit board layout or output capacitor ESR, and may have its gain set independent of the offset component. The generated AC ripple component is synchronized to the inductor switching actions of the voltage regulator and thus reflects actual inductor phase switching in single and multi-phase regulation applications.

Abstract: A ripple-mode controller provides reliable operation in multi-phase power supply circuits, over a variety of operating conditions. Cross-phase blanking allows the controller to preserve the desired phase relationship between the switching pulses its provides to the different output phases, and permits the controller to operate each output phase at nearly 100% duty cycles. Active current sharing compliments blanking operations by adjusting the width of switching pulses the controller provides to one or more of the output phases based on detecting load current imbalances between the different output phases. With active current sharing, the controller prevents one or more output phases from carrying excessive portions of the load current. Further complimenting its operation, the controller may include virtual ripple generation to increase the noise immunity of its ripple-mode regulation.

Abstract: A voltage positioning technique allows a power supply controller to more fully exploit active voltage positioning as a way of maintaining supply voltage within the limits defined for an associated electrical load. The supply voltage is allowed to “droop” as a function of load current. Droop may be implemented in linear proportion to load current, or as a discrete droop function once load current exceeds a given threshold. In either case, the droop circuitry of the supply controller implements a bounding function that establishes an accurately known maximum droop voltage magnitude. This maximum droop voltage limit establishes a reliable lower limit for the supply voltage independent of increasing load current. This accurately set lower bound for the droop voltage enables the controller to more aggressively position the supply voltage at the lower voltage limit of the load, which minimizes voltage overshoot and load power consumption.

Abstract: A voltage positioning technique allows a power supply controller to more fully exploit active voltage positioning as a way of maintaining supply voltage within the limits defined for an associated electrical load. The supply voltage is allowed to “droop” as a function of load current. Droop may be implemented in linear proportion to load current, or as a discrete droop function once load current exceeds a given threshold. In either case, the droop circuitry of the supply controller implements a bounding function that establishes an accurately known maximum droop voltage magnitude. This maximum droop voltage limit establishes a reliable lower limit for the supply voltage independent of increasing load current. This accurately set lower bound for the droop voltage enables the controller to more aggressively position the supply voltage at the lower voltage limit of the load, which minimizes voltage overshoot and load power consumption.

Abstract: A system and method provides virtual ripple signal generation for use in voltage regulation applications. Some switch-mode power converters or voltage regulators use output signal ripple to effect voltage regulation. A virtual ripple generator provides this type of voltage regulator with a virtual ripple signal comprising an offset component responsive to actual load voltage, but with a generated AC ripple component of arbitrary magnitude that is independent of actual output signal ripple. Unlike the actual output ripple signal, the generated AC ripple component is not dependent on implementation specifics, such as circuit board layout or output capacitor ESR, and may have its gain set independent of the offset component. The generated AC ripple component is synchronized to the inductor switching actions of the voltage regulator and thus reflects actual inductor phase switching in single and multi-phase regulation applications.

Abstract: A ripple-mode controller provides reliable operation in multi-phase power supply circuits, over a variety of operating conditions. Cross-phase blanking allows the controller to preserve the desired phase relationship between the switching pulses its provides to the different output phases, and permits the controller to operate each output phase at nearly 100% duty cycles. Active current sharing compliments blanking operations by adjusting the width of switching pulses the controller provides to one or more of the output phases based on detecting load current imbalances between the different output phases. With active current sharing, the controller prevents one or more output phases from carrying excessive portions of the load current. Further complimenting its operation, the controller may include virtual ripple generation to increase the noise immunity of its ripple-mode regulation.

Abstract: A differential pair having a current source for providing amplification and slewing currents and a large signal circuit responsive to the differential pair input signals for shunting slewing current from the current source away from the differential pair for low input differential and linearly varying the amount of slewing current to be provided from the current source to the differential pair for higher input differentials.

Abstract: A current cancellation circuit having, and method for producing, a low noise spectral density current for cancelling the DC input bias current of an input signal to an amplifier. The cancellation circuit provides for generating a DC cancelling current having a magnitude K times greater than the magnitude of the input DC bias current and then reducing the same by K times. The resulting cancelling current has a reduced noise current spectral density associated with it, thereby reducing the overall noise current spectral density of the input stage.

Abstract: To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism “zeros-out” DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new “switched-to” PWM mode cycle is DC offset-free.