Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: Disclosed is power amplifier circuitry having a bipolar junction power transistor with a base, a collector, and an emitter. The power amplifier circuitry includes bias correction sub-circuitry configured to generate a compensation current substantially opposite in phase and substantially equal in magnitude to an error current passed by a parasitic base-collector capacitance inherently coupled between the base and collector, wherein the bias correction sub-circuitry has a compensation output coupled to the base and through which the compensation current flows to substantially cancel the error current.

Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: The present disclosure relates to an envelope tracking system that is configured to improve the performance of radio frequency power amplifier circuitry by compensating for errors that become more significant as modulation bandwidth increases. These errors include power amplifier collector-base capacitance, time delay between power amplifier stages, and interconnect distance between the baseband modulation source and the power amplifier collector.

Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Abstract: The present disclosure relates to an envelope tracking system that is configured to improve the performance of radio frequency power amplifier circuitry by compensating for errors that become more significant as modulation bandwidth increases. These errors include power amplifier collector-base capacitance, time delay between power amplifier stages, and interconnect distance between the baseband modulation source and the power amplifier collector.

Abstract: Disclosed is power amplifier circuitry having a bipolar junction power transistor with a base, a collector, and an emitter. The power amplifier circuitry includes bias correction sub-circuitry configured to generate a compensation current substantially opposite in phase and substantially equal in magnitude to an error current passed by a parasitic base-collector capacitance inherently coupled between the base and collector, wherein the bias correction sub-circuitry has a compensation output coupled to the base and through which the compensation current flows to substantially cancel the error current.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Abstract: A direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply is disclosed. The charge pump buck power supply includes a charge pump buck converter, a first inductive element, and an energy storage element. The charge pump buck converter and the first inductive element are coupled in series between a DC power supply, such as a battery, and the energy storage element. The buck power supply includes a buck converter, a second inductive element, and the energy storage element. The buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element. As such, the charge pump buck power supply and the buck power supply share the energy storage element.

Abstract: A radio frequency (RF) switch semiconductor die and an RF supporting structure are disclosed. The RF switch semiconductor die is attached to the RF supporting structure. The RF switch semiconductor die has a first edge and a second edge, which may be opposite from the first edge. The RF supporting structure has a group of alpha supporting structure connection nodes, which is adjacent to the first edge; a group of beta supporting structure connection nodes, which is adjacent to the second edge; and an alpha AC grounding supporting structure connection node, which is adjacent to the second edge. When the group of alpha supporting structure connection nodes and the alpha AC grounding supporting structure connection node are active, the group of beta supporting structure connection nodes are inactive.

Abstract: RF PA circuitry and a DC-DC converter, which includes an RF PA envelope power supply and DC-DC control circuitry, are disclosed. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. The DC-DC control circuitry has a DC-DC look-up table (LUT) structure, which has at least a first DC-DC LUT. The DC-DC control circuitry uses DC-DC LUT index information as an index to the DC-DC LUT structure to obtain DC-DC converter operational control parameters. The DC-DC control circuitry then configures the PA envelope power supply using the DC-DC converter operational control parameters. Using the DC-DC LUT structure provides flexibility in configuring the DC-DC converter for different applications, for multiple static operating conditions, for multiple dynamic operating conditions, or any combination thereof.

Abstract: The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.

Abstract: Circuitry, which includes a direct current (DC)-DC converter having a first switching power supply is disclosed. The first switching power supply includes a first switching converter, an energy storage element, a first inductive element, which is coupled between the first switching converter and the energy storage element, and a first snubber circuit, which is coupled across the first inductive element. The first switching power supply receives and converts a DC power supply signal to provide a first switching power supply output signal based on a setpoint.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Abstract: Radio Frequency (RF) signal conditioning circuitry, which includes RF detection circuitry and RF attenuation circuitry is disclosed. The RF detection circuitry receives and detects an RF sample signal to provide an RF detection signal. The RF attenuation circuitry has an attenuation circuitry input, and receives and attenuates the RF sample signal via the attenuation circuitry input to provide an attenuated RF signal. The RF attenuation circuitry presents an attenuation circuitry input impedance at the attenuation circuitry input. The attenuated RF signal and the RF detection signal are provided concurrently.

Abstract: Embodiments of the present disclosure relate to an overlay class F choke of a radio frequency (RF) power amplifier (PA) stage and an RF PA amplifying transistor of the RF PA stage. The overlay class F choke includes a pair of mutually coupled class F inductive elements, which are coupled in series between a PA envelope power supply and a collector of the RF PA amplifying transistor. In one embodiment of the RF PA stage, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor. The collector of the RF PA amplifying transistor provides the RF stage output signal. The PA envelope power supply provides an envelope power supply signal to the overlay class F choke. The envelope power supply signal provides power for amplification.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first switching converter and the multi-stage filter form a feedback loop, which is used to regulate the first switching power supply output signal based on the setpoint. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.