Patents by Inventor Terry L. Lines

Terry L. Lines has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for providing a dual via architecture for thin film resistors
    Patent number: 7960240
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. First and second portions of a first dielectric material are formed over the resistor protect layer over the first and second ends of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the first dielectric material as a hard mask. Then a second dielectric layer is deposited. A first via mask and etch process is used to etch vias down to the underlying portions of the resistor protect layer over the ends of the thin film resistor. A second via mask and etch process is used to etch substrate vias to an underlying conductor layer.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: June 14, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, Michael Burger, Terry L. Lines
  • System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    Patent number: 7808048
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: October 5, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, William Max Coppock, Richard W. Foote, Jr., Terry L. Lines, Tom Bold
  • System and method for providing a dual via architecture for thin film resistors
    Patent number: 7410879
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. First and second portions of a first dielectric material are formed over the resistor protect layer over the first and second ends of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the first dielectric material as a hard mask. Then a second dielectric layer is deposited. A first via mask and etch process is used to etch vias down to the underlying portions of the resistor protect layer over the ends of the thin film resistor. A second via mask and etch process is used to etch substrate vias to an underlying conductor layer.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: August 12, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, Michael Burger, Terry L. Lines
  • System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    Patent number: 7332403
    Abstract: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: February 19, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Rodney Hill, Victor Torres, William Max Coppock, Richard W. Foote, Jr., Terry L. Lines, Tom Bold