Abstract: A method for protecting an assembled circuit board by providing a layer of rosin micro-spheres directly on the components to be protected, heating the micro-spheres to a temperature of about 65° C. for a time sufficient to cause the micro-spheres to flow and the rosin to crosslink, and then allowing the board to cool until the rosin returns to its solid state. The rosin micro-spheres may be put onto the board and components by first loading the microspheres onto a transfer tape and then positioning the transfer tape, microspheres down, over the components to be protected. After the rosin is heated the tape may be removed. The method is effective for protecting assembled boards against airborne S to prevent creep corrosion of the copper metallization, and for protecting against Sn to prevent the formation of tin whiskers in tin-plated or soldered lead-free assemblies.

Abstract: A method for protecting an assembled circuit board by providing a layer of rosin micro-spheres directly on the components to be protected, heating the micro-spheres to a temperature of about 65° C. for a time sufficient to cause the micro-spheres to flow and the rosin to crosslink, and then allowing the board to cool until the rosin returns to its solid state. The rosin micro-spheres may be put onto the board and components by first loading the microspheres onto a transfer tape and then positioning the transfer tape, microspheres down, over the components to be protected. After the rosin is heated the tape may be removed. The method is effective for protecting assembled boards against airborne S to prevent creep corrosion of the copper metallization, and for protecting against Sn to prevent the formation of tin whiskers in tin-plated or soldered lead-free assemblies.

Abstract: A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.

Abstract: A device for monitoring a working environment in which electronic circuit boards are present includes: a) test circuit boards with pairs of traces and circuitry for determining the electrical resistance between the traces, the test boards being positioned in a pathway effective for directing air across the test traces; b) control elements for controlling the flow of air through the pathway and for controlling power applied to the test board traces; c) data storage for storing data relating to acceptable electrical resistance between test traces; d) circuitry for comparing measured electrical resistance between two test traces to a stored value for the acceptable electrical resistance between two test traces; and e) an output for communicating the results of the comparison between the measured electrical resistance between two test traces and the stored value for the acceptable electrical resistance between two test traces.

Abstract: A device for monitoring a working environment in which electronic circuit boards are present includes: a) test circuit boards with pairs of traces and circuitry for determining the electrical resistance between the traces, the test boards being positioned in a pathway effective for directing air across the test traces; b) control elements for controlling the flow of air through the pathway and for controlling power applied to the test board traces; c) data storage for storing data relating to acceptable electrical resistance between test traces; d) circuitry for comparing measured electrical resistance between two test traces to a stored value for the acceptable electrical resistance between two test traces; and e) an output for communicating the results of the comparison between the measured electrical resistance between two test traces and the stored value for the acceptable electrical resistance between two test traces.

Abstract: A method for protecting an electronic circuit board by covering the board with a composition comprising rosin and a carrier and allowing the composition to dry. The coating may be provided by spraying over all or selected parts of an assembled board, or as an underfill by microdispensing under one or more components. The rosin-containing composition may include 20% to 95% rosin and 5% to 80% of a carrier, although 30% to 80% rosin and 20% to 70% carrier, or even 30% to 50% rosin and 50% to 70% carrier, may be more preferred. The carrier may be an alcohol, such as isopropyl alcohol, and should be free of flux activators.

Abstract: A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.

Abstract: A test cell for analyzing residue on the surface of a microelectronic component includes a cleaning tip with an opening at one end for passing cleaning fluid into the chamber and for passing used cleaning fluid out of the chamber, and an opening at the other end to access a test area in which cleaning fluid may contact the surface of a component to be tested. A third opening for venting the cleaning tip chamber to the atmosphere may also be provided. A common cleaning/aspiration passageway communicates with the cleaning tip chamber through the first opening. A cleaning passageway provides fresh cleaning fluid to the cleaning/aspiration passageway. An aspiration passageway removes used cleaning fluid from the cleaning/aspiration passageway. An analysis chamber in fluid communication with the aspiration passageway has electrodes effective for qualitatively and/or quantitatively measuring residue removed from the microelectronic surface by the cleaning fluid.

Abstract: A test cell for analyzing residue on the surface of a microelectronic component includes a cleaning tip with an opening at one end for passing cleaning fluid into the chamber and for passing used cleaning fluid out of the chamber, and an opening at the other end to access a test area in which cleaning fluid may contact the surface of a component to be tested. A third opening for venting the cleaning tip chamber to the atmosphere may also be provided. A common cleaning/aspiration passageway communicates with the cleaning tip chamber through the first opening. A cleaning passageway provides fresh cleaning fluid to the cleaning/aspiration passageway. An aspiration passageway removes used cleaning fluid from the cleaning/aspiration passageway. An analysis chamber in fluid communication with the aspiration passageway has electrodes effective for qualitatively and/or quantitatively measuring residue removed from the microelectronic surface by the cleaning fluid.

Abstract: A device for monitoring a working environment in which electronic circuit boards are present includes: a) test circuit boards with pairs of traces and circuitry for determining the electrical resistance between the traces, the test boards being positioned in a pathway effective for directing air across the test traces; b) control elements for controlling the flow of air through the pathway and for controlling power applied to the test board traces; c) data storage for storing data relating to acceptable electrical resistance between test traces; d) circuitry for comparing measured electrical resistance between two test traces to a stored value for the acceptable electrical resistance between two test traces; and e) an output for communicating the results of the comparison between the measured electrical resistance between two test traces and the stored value for the acceptable electrical resistance between two test traces.

Abstract: An apparatus and test method for determining the cleanliness (based on corrosivity) of a specific area on an electronic circuit assembly, such as the area between holes or pads on a single side of an assembly. The apparatus includes: (1) an extraction cell for providing an extraction fluid to an electronic circuit assembly ("ECA") area to be measured; (2) an extraction fluid for extracting residue from the ECA area to be measured; (3) a test cell with two or more electrodes and a voltage source for providing a voltage to the electrodes; and (4) a timer for measuring the time between the application of the voltage and an electrical short between the electrodes.