Patents by Inventor Terry Lee Sterrett

Terry Lee Sterrett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnection designs and materials having improved strength and fatigue life
    Patent number: 9136239
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: September 15, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Terry Lee Sterrett, Richard J. Harries
  • INTERCONNECTION DESIGNS AND MATERIALS HAVING IMPROVED STRENGTH AND FATIGUE LIFE
    Publication number: 20140203430
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Application
    Filed: February 3, 2014
    Publication date: July 24, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Terry Lee Sterrett, Richard J. Harries
  • Interconnection designs and materials having improved strength and fatigue life
    Patent number: 8642462
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: February 4, 2014
    Assignee: Micorn Technology, Inc.
    Inventors: Terry Lee Sterrett, Richard J. Harries
  • Low temperature bumping process
    Patent number: 7718216
    Abstract: A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: May 18, 2010
    Assignee: Intel Corporation
    Inventors: Terry Lee Sterrett, Tian-An Chen, Saikumar Jayaraman
  • Low temperature bumping process
    Patent number: 7521115
    Abstract: A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: April 21, 2009
    Assignee: Intel Corporation
    Inventors: Terry Lee Sterrett, Tian An Chen, Saikumar Jayaraman
  • INTERCONNECTION DESIGNS AND MATERIALS HAVING IMPROVED STRENGTH AND FATIGUE LIFE
    Publication number: 20080254611
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 16, 2008
    Applicant: INTEL CORPORATION (A DELAWARE CORPORATION)
    Inventors: TERRY LEE STERRETT, RICHARD J. HARRIES
  • Interconnection designs and materials having improved strength and fatigue life
    Patent number: 7387827
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: June 17, 2008
    Assignee: Intel Corporation
    Inventors: Terry Lee Sterrett, Richard J. Harries
  • Low temperature bumping process
    Publication number: 20040115408
    Abstract: A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Applicant: Intel Corporation
    Inventors: Terry Lee Sterrett, Tian An Chen, Saikumar Jayaraman
  • Interconnection designs and materials having improved strength and fatigue life
    Publication number: 20040115409
    Abstract: Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.
    Type: Application
    Filed: April 30, 2003
    Publication date: June 17, 2004
    Applicant: Intel Corporation
    Inventors: Terry Lee Sterrett, Richard J. Harries