Abstract: An interconnection system for high performance electronic hybrids employs micro-machined features on a substrate to connect directly to miniature electronic components, such as integrated circuits. The micro-machined features may include posts for connecting to bonding pads of standard components and may also include rails for alignment of components and connections to specially made components.

Abstract: A method of fabricating programmable interlayer conductive links in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more link regions of the insulative layer, forming at least one upper conductor over the implanted regions and selectively applying sufficient energy to at least one of the implanted regions of the integrated circuit structure to render the selected link region conductive. The invention also embraces customized integrated circuit structures with interlayer conductive paths made in accordance with this method.

Abstract: A method of producing interlayer conductive paths having substantially planar top surfaces in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more selected regions of the insulative layer, forming at least one upper conductor over the selected regions and sintering the integrated circuit structure sufficient to render the selected regions conductive. The invention also embraces an integrated circuit structures with interlayer conductive paths made in accordance with this method.

Abstract: Lead connections and packaging for integrated circuits are formed by processing elongated ribbon arrays of integrated circuit dice in groups prior to cutting the ribbon along its length to free the discrete integrated circuit products. The ribbon is adhered to the base of an elongated channel having at least one leg containing implanted lead-in conductors arranged therein as an axial series of axial arrays of conductors. The axial arrays are aligned with the circuits on the ribbons and interconnections therebetween are formed as photolithographically defined conductive coatings on a top surface of the ribbon extending from bonding pads of the integrated circuit to exposed conductor ends at a top end(s) of the leg(s). The channel ribbon assembly is cut into discrete circuits after forming such interconnections for all the circuits of the ribbon as a group.