Patents by Inventor Terry P. Borer

Terry P. Borer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for designing systems using logic regions
    Patent number: 7197734
    Abstract: A method for positioning components of a system onto a target device utilizing programmable logic devices (PLDs) is disclosed. A first location on the target device for a first logic region having a first component is determined. Determined properties of the first logic region are preserved. The first logic region is integrated with a second logic region having a second component in view of the determined properties.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: March 27, 2007
    Assignee: Altera Corporation
    Inventors: Deshanand P. Singh, Terry P. Borer, Steven Caranci, Tim Vanderhoek, Ivan Hamer, Jimmy Kuo, Przemek Guzy, Alexander Grbic, Rebecca Katzin, Stephen D. Brown, Zvonko Vranesic
  • Method and apparatus for implementing soft constraints in tools used for designing systems on programmable logic devices
    Patent number: 7194720
    Abstract: A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: March 20, 2007
    Assignee: Altera Corporation
    Inventors: Terry P. Borer, Gabriel Quan, Stephen D. Brown, Deshanand P. Singh, Chris Sanford, Vaughn Betz, Caroline Pantofaru, Jordan Swartz
  • Method and apparatus for placement of components onto programmable logic devices
    Patent number: 7181717
    Abstract: A method for positioning components of a system onto a target device utilizing programmable logic devices (PLDs) is disclosed. A location is determined for a user defined region on the target device that allows the system to satisfy timing constraints.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: February 20, 2007
    Assignee: Altera Corporation
    Inventors: Deshanand P. Singh, Stephen D. Brown, Terry P. Borer, Chris Sanford, Gabriel Quan
  • Method and apparatus for placement of components onto programmable logic devices
    Patent number: 6779169
    Abstract: A method for positioning components of a system onto a target device utilizing programmable logic devices (PLDs) is disclosed. A location is determined for a user defined regions on the target device that allows the system to satisfy timing constraints.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: August 17, 2004
    Assignee: Altera Corporation
    Inventors: Deshanand P. Singh, Stephen D. Brown, Terry P. Borer, Chris Sanford, Gabriel Quan