Patents by Inventor Terry R. Gullinger

Terry R. Gullinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5023200
    Abstract: A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: June 11, 1991
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: Robert S. Blewer, Terry R. Gullinger, Michael J. Kelly, Sylvia S. Tsao