Abstract: A method for encoding a binary input sequence x(0,1) to obtain a duobinary output sequence y(+1,0,-1) is provided. The duobinary coding technique always provides an output bit y.sub.k =0 when the corresponding bit x.sub.k =0; bits y.sub.k alternatively assume a logical level "+1" and "-1" whenever an input bit x.sub.k-1 =0 changes to x.sub.k =1, and the output bit y.sub.k maintains the logical level "+1" or "-1" whenever the corresponding bit x.sub.k maintains the logical level "1". A coding device for encoding a binary input sequence x(0,1) to a duobinary output sequence y(+1,0,-1) is also provided, comprising a D-type flip-flop for generating a binary switch signal. A first AND circuit receives the input sequence and the switch signal, and provides a first binary sequence a(0,1), while a second AND circuit receives the input sequence and the complement of the switch signal and provides a second binary sequence b(0,1).