Abstract: In accordance with the present invention, there is provided a punch quad flat no leads (QFN) semiconductor package including a leadframe wherein the leads of the leadframe are selectively half-etched so that only one or more prescribed leads may be electrically connected to a conformal shield applied to the package body of the semiconductor package. The conformal shield may be electrically connected to the exposed lead(s) alone, or in combination with one or more tie bars of the leadframe. In one embodiment, outer end portions of the top surfaces of the leads of the semiconductor package are alternately exposed and non-exposed, with the non-exposed leads including a top side half-etch which causes the same to be effectively covered by the package body of the semiconductor package.

Abstract: In accordance with the present invention, there is provided a punch quad flat no leads (QFN) semiconductor package including a leadframe wherein the leads of the leadframe are selectively half-etched so that only one or more prescribed leads may be electrically connected to a conformal shield applied to the package body of the semiconductor package. The conformal shield may be electrically connected to the exposed lead(s) alone, or in combination with one or more tie bars of the leadframe. In one embodiment, outer end portions of the top surfaces of the leads of the semiconductor package are alternately exposed and non-exposed, with the non-exposed leads including a top side half-etch which causes the same to be effectively covered by the package body of the semiconductor package.

Abstract: A semiconductor package comprising a plurality of elongate leads which each have opposed inner and outer ends, opposed first and second surfaces, and a third surface which is disposed in opposed relation to the first surface and recessed relative to the second surface. The second surface of each lead is positioned in close proximity to the inner end thereof. The third surface of each lead extends to the outer end thereof. A semiconductor die is attached to portions of the first surfaces of at least some of the leads. The semiconductor die is itself electrically connected to at least some of the leads. A package body covers the semiconductor die and the leads such that the second surfaces of the leads are exposed in a bottom surface of the package body and the outer ends of the leads are exposed in respective side surfaces of the package body.

Abstract: A semiconductor package comprising a plurality of elongate leads which each have opposed inner and outer ends, opposed first and second surfaces, and a third surface which is disposed in opposed relation to the first surface and recessed relative to the second surface. The second surface of each lead is positioned in close proximity to the inner end thereof. The third surface of each lead extends to the outer end thereof. A semiconductor die is attached to portions of the first surfaces of at least some of the leads. The semiconductor die is itself electrically connected to at least some of the leads. A package body covers the semiconductor die and the leads such that the second surfaces of the leads are exposed in a bottom surface of the package body and the outer ends of the leads are exposed in respective side surfaces of the package body.

Abstract: A method of fabricating a semiconductor package comprising the step of providing a leadframe strip which defines a strip plane and a multiplicity of leadframes. Each of the leadframes includes an outer frame defining a central opening and a die pad disposed within the central opening. Each leadframe further includes a plurality of leads which are attached to the outer frame and extend toward the die pad in spaced relation to each other. The outer frames are integrally connected to each other and collectively define connecting bars which extend in multiple rows and columns and define saw streets. Semiconductor dies are attached to respective ones of the die pads, with the semiconductor dies being mechanically and electrically connected to the leads of respective ones of the leadframes. Thereafter, an encapsulant material is applied to the leadframe strip to form at least one mold cap which at least partially encapsulates the leadframes, the semiconductor dies, and the conductive wires.

Abstract: A method of fabricating semiconductor packages from a lead frame strip which includes a mold cap applied to one side thereof, and defines a multiplicity of lead frames integrally connected to each other by connecting bars which extend in multiple rows and columns and define saw streets. In the singulation method of the present invention, the mold cap is sawed along the saw streets to expose the connecting bars. Thereafter, the connecting bars are chemically etched to separate the lead frames from each other.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.

Abstract: A tray for housing integrated circuit components or chips and an apparatus for transporting the chips to the tray from a bulk supply of chips. The tray protects the chips against damage during handling, storage and shipping, can be readily and repeatedly connected to another like tray in a releasable manner, and is designed for positive alignment with respect to the apparatus. The apparatus is manually activated and readily transports the chips without damage.

Abstract: An adjustment device for a screen printing machine wherein the tension on pivotally mounted screen holding arms may be adjusted to accommodate screens of various sizes and weights. The adjustment device includes a vertically adjustable connector to which one end of a coil spring associated with a screen holding arm is connected. The adjustment device includes at least one bolt which mounts the connector for up or down movement upon rotation of the bolt, so that the connector, and spring, are moved relative to a horizontal plane containing the pivot axis of the screen holding arm. By suitably adjusting the spring connector via rotation of the bolt, the spring rate may be altered and leverage is created for moving the spring to up and down positions. An adjustment device for accomplishing similar results in used for gas compression cylinders extending between screen holding arms and the machine head.