Patents by Inventor Teruhiko Kamibayashi

Teruhiko Kamibayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9524538
    Abstract: A first interpolation processor of an image processing apparatus performs a first interpolation process, using values of a plurality of input pixels of an input image aligned in an arranged direction that is one of a horizontal direction and a vertical direction. Thus, the first interpolation processor derives a value of each of a plurality of noted points on an inclined interpolation line inclined relative to the horizontal direction and extending through a location of a processed pixel of an output image. Moreover, second interpolation processor derives a value of the processed pixel by performing a second interpolation process, using the derived values of the plurality of noted points on the inclined interpolation line.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: December 20, 2016
    Assignee: FUJITSU TEN LIMITED
    Inventors: Takeo Matsumoto, Teruhiko Kamibayashi, Kohji Ohnishi, Tomoyuki Fujimoto, Daisuke Yamamoto
  • Publication number: 20160311372
    Abstract: An image processing device according to an aspect of the embodiment includes an image generating unit that generates an image at a virtual viewpoint based on a captured image of an image capturing unit, and an image processing unit that generates an image in which an image for synthesis is displayed on the image at the virtual viewpoint. The image processing unit performs a process for decreasing visibility of the image for synthesis when the image at the virtual viewpoint is an image at a viewpoint location of the virtual viewpoint while the viewpoint location is moving.
    Type: Application
    Filed: April 5, 2016
    Publication date: October 27, 2016
    Applicant: FUJITSU TEN LIMITED
    Inventors: Takayuki OZASA, Teruhiko KAMIBAYASHI, Kohji OHNISHI, Takeo MATSUMOTO, Tomoyuki FUJIMOTO, Daisuke YAMAMOTO
  • Publication number: 20160086308
    Abstract: A first interpolation processor of an image processing apparatus performs a first interpolation process, using values of a plurality of input pixels of an input image aligned in an arranged direction that is one of a horizontal direction and a vertical direction. Thus, the first interpolation processor derives a value of each of a plurality of noted points on an inclined interpolation line inclined relative to the horizontal direction and extending through a location of a processed pixel of an output image. Moreover, second interpolation processor derives a value of the processed pixel by performing a second interpolation process, using the derived values of the plurality of noted points on the inclined interpolation line.
    Type: Application
    Filed: September 10, 2015
    Publication date: March 24, 2016
    Inventors: Takeo MATSUMOTO, Teruhiko KAMIBAYASHI, Kohji OHNISHI, Tomoyuki FUJIMOTO, Daisuke YAMAMOTO
  • Patent number: 8952997
    Abstract: An image processor receives information of a type of an input image, and performs a correction to the input image in accordance with an illuminance in an area near a display that displays the input image and the received information of the type of the input image.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: February 10, 2015
    Assignee: Fujitsu Ten Limited
    Inventors: Kohji Ohnishi, Teruhiko Kamibayashi, Takeo Matsumoto, Shizuka Tamura, Tomoyuki Fujimoto
  • Publication number: 20120223924
    Abstract: An image processing apparatus corrects an input image based on a correction amount determined based on an illuminance, and adjusts a specifying value for specifying brightness of a backlight of a display based on the correction amount.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 6, 2012
    Applicant: FUJITSU TEN LIMITED
    Inventors: Takeo MATSUMOTO, Kohji OHNISHI, Teruhiko KAMIBAYASHI, Shizuka TAMURA, Tomoyuki FUJIMOTO
  • Publication number: 20120212518
    Abstract: An image processor receives information of a type of an input image, and performs a correction to the input image in accordance with an illuminance in an area near a display that displays the input image and the received information of the type of the input image.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 23, 2012
    Applicant: FUJITSU TEN LIMITED
    Inventors: Kohji OHNISHI, Teruhiko KAMIBAYASHI, Takeo MATSUMOTO, Shizuka TAMURA, Tomoyuki FUJIMOTO
  • Publication number: 20100110094
    Abstract: A display control device includes: a differential circuit that detects a difference in luminance between a first image and a second image in units of pixels; a comparison circuit that detects whether or not the difference in luminance between the first image data and the second image data is equal to or greater than a first threshold value on the basis of the detected differential value in luminance; a controller that interpolates a pixel value, having a luminance smaller than an attention pixel of at least one of the first image and the second image, in said at least one of the first image and the second image, when a difference in luminance between an attention pixel of the first image and an attention pixel of the second image is equal to or greater than a first threshold value; and a liquid crystal panel driving unit 74 that displays the first image and the second image on a common display portion such that the first image and the second image are respectively visible from different viewing directions.
    Type: Application
    Filed: March 17, 2008
    Publication date: May 6, 2010
    Applicant: Fujitsu Ten Limited
    Inventors: Teruhiko Kamibayashi, Junji Hashimoto
  • Publication number: 20070296865
    Abstract: A display unit displays independent pictures for a plurality of viewing directions on a single screen based on a video signal. A conversion processing unit generates new pixel data based on original pixel data constituting a picture source signal. An extraction processing unit extracts a predetermined number of pixel data for generating the video signal from the new pixel data. The conversion processing unit generates the new pixel data based on arbitrary original pixel data and at least adjacent original pixel data that is adjacent to the arbitrary original pixel data, considering an extraction of the pixel data by the extraction processing unit.
    Type: Application
    Filed: November 2, 2005
    Publication date: December 27, 2007
    Applicant: FUJITSU TEN LIMITED
    Inventors: Atsushi Mino, Satoru Uehara, Takumi Yoshimoto, Teruhiko Kamibayashi
  • Patent number: 7292181
    Abstract: Provided is a RAM check unit capable of checking a RAM included in a radar system even when the radar system is in operation. An LSI instructs a high-frequency unit to output a radar-transmitted signal. When a radar-received signal is received from the high-frequency unit, calculation is performed based on the signal. The result of the calculation is transferred to a CPU. The CPU transmits a calculated distance to the outside. When a processing end sensing unit included in the LSI senses termination of radar-received signal processing, an RAM check unit initiates RAM check. When the RAM check is terminated, the high-frequency unit is instructed to output a radar-transmitted signal. Consequently, the RAM check is performed during a period between pieces of radar-received signal processing during which a load on the LSI is light. Thus, the RAM check can be performed even when the radar system is in operation.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: November 6, 2007
    Assignee: Fujitsu Ten Limited
    Inventors: Teruhiko Kamibayashi, Yukio Ishikawa
  • Publication number: 20060038715
    Abstract: Provided is a RAM check unit capable of checking a RAM included in a radar system even when the radar system is in operation. An LSI instructs a high-frequency unit to output a radar-transmitted signal. When a radar-received signal is received from the high-frequency unit, calculation is performed based on the signal. The result of the calculation is transferred to a CPU. The CPU transmits a calculated distance to the outside. When a processing end sensing unit included in the LSI senses termination of radar-received signal processing, an RAM check unit initiates RAM check. When the RAM check is terminated, the high-frequency unit is instructed to output a radar-transmitted signal. Consequently, the RAM check is performed during a period between pieces of radar-received signal processing during which a load on the LSI is light. Thus, the RAM check can be performed even when the radar system is in operation.
    Type: Application
    Filed: July 15, 2005
    Publication date: February 23, 2006
    Applicant: Fujitsu Ten Limited
    Inventors: Teruhiko Kamibayashi, Yukio Ishikawa