Patents by Inventor Teruhiko Kimura
Teruhiko Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9779586Abstract: A game server provides a second game after a ranking of players is determined based on results of a first game in which plural players have participated is provided with an allocator that allocates a first option of plural first options to each of a predetermined number of high-order players in the ranking of the first game, the first option allocated to one of the high-order players differing from the first option allocated to another of the high-order players; a low-order player entry receiver that receives an entry for participation in the second game from a low-order player other than the predetermined number of high-order players, the entry for participation being received when one of the plural first options is selected; a determination unit that determines one of options including the plural first options; and a benefit awarder that awards benefit to a player having selected the first option determined by the determination unit.Type: GrantFiled: April 25, 2014Date of Patent: October 3, 2017Assignee: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Masayuki Saruta, Kiyohiko Yamane, Teruhiko Kimura, Saori Hanaoka, Ryu Nagashima, Toshio Yoshioka
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Patent number: 9600972Abstract: A first game system includes plural terminal devices at which a game can be played by a player; and a game server configured to communicate with the terminal devices. The first game server stores game data corresponding to the game in a database, and updates game data stored in the database in accordance with the progress of a game that is played at one of the terminal devices, followed by again updating the game data in accordance with the progress of the game that is played at another of the terminal devices.Type: GrantFiled: April 24, 2014Date of Patent: March 21, 2017Assignee: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Kiyohiko Yamane, Ryu Nagashima, Toshio Yoshioka, Masayuki Saruta, Teruhiko Kimura, Saori Hanaoka
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Patent number: 9323933Abstract: An information processing apparatus includes a first storage storing an operating system program, a second storage including a boot program storage area, a first area and a second area, and a processor coupled to the first storage and the second storage. The processor writes the first path information, which is stored in the first area and used to boot up the operating system program, into the second area, upon first booting-up, compares the first path information in the first area and the second path information in the second area upon second booting-up subsequent to the first booting-up, determines whether the operating system program indicated by the first path information is to be booted up based on a result of the comparing, and writes the second path information into the first area when the operating system program indicated by the first path information is not to be booted up.Type: GrantFiled: August 23, 2013Date of Patent: April 26, 2016Assignee: FUJITSU LIMITEDInventor: Teruhiko Kimura
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Publication number: 20140235356Abstract: A first game system includes plural terminal devices at which a game can be played by a player; and a game server configured to communicate with the terminal devices. The first game server stores game data corresponding to the game in a database, and updates game data stored in the database in accordance with the progress of a game that is played at one of the terminal devices, followed by again updating the game data in accordance with the progress of the game that is played at another of the terminal devices.Type: ApplicationFiled: April 24, 2014Publication date: August 21, 2014Applicant: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Kiyohiko YAMANE, Ryu NAGASHIMA, Toshio YOSHIOKA, Masayuki SARUTA, Teruhiko KIMURA, Saori HANAOKA
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Publication number: 20140235329Abstract: A game server provides a second game after a ranking of players is determined based on results of a first game in which plural players have participated is provided with an allocator that allocates a first option of plural first options to each of a predetermined number of high-order players in the ranking of the first game, the first option allocated to one of the high-order players differing from the first option allocated to another of the high-order players; a low-order player entry receiver that receives an entry for participation in the second game from a low-order player other than the predetermined number of high-order players, the entry for participation being received when one of the plural first options is selected; a determination unit that determines one of options including the plural first options; and a benefit awarder that awards benefit to a player having selected the first option determined by the determination unit.Type: ApplicationFiled: April 25, 2014Publication date: August 21, 2014Applicant: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Masayuki SARUTA, Kiyohiko YAMANE, Teruhiko KIMURA, Saori HANAOKA, Ryu NAGASHIMA, Toshio YOSHIOKA
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Publication number: 20130346738Abstract: An information processing apparatus includes a first storage storing an operating system program, a second storage including a boot program storage area, a first area and a second area, and a processor coupled to the first storage and the second storage. The processor writes the first path information, which is stored in the first area and used to boot up the operating system program, into the second area, upon first booting-up, compares the first path information in the first area and the second path information in the second area upon second booting-up subsequent to the first booting-up, determines whether the operating system program indicated by the first path information is to be booted up based on a result of the comparing, and writes the second path information into the first area when the operating system program indicated by the first path information is not to be booted up.Type: ApplicationFiled: August 23, 2013Publication date: December 26, 2013Applicant: FUJITSU LIMITEDInventor: Teruhiko KIMURA
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Publication number: 20130190078Abstract: A relay device connected to a game device receives an increase instruction for increasing a credit number via a communication unit that communicates with an outside, and stores the credit number to be increased. The relay device generates pseudo medal detection pulses, and supplies medal detection pulses obtained by a logical sum between normal medal detection pulses that are generated in the game device and the pseudo medal detection pulses to a game device. When receiving the increase instruction, the relay device generates a pseudo discharge signal that gives an instruction to discharge medals inserted in the game device out of the device, and supplies a discharge signal obtained by a logical sum between a normal discharge signal that is generated in the game device and the pseudo discharge signal to the game device. After the pseudo discharge signal is generated, the relay device generates the pseudo medal detection pulses, whose number corresponds to the credit number stored in a storage unit.Type: ApplicationFiled: December 20, 2011Publication date: July 25, 2013Applicant: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Nobuhiro Goto, Tetsuo Ishida, Jun Komatsu, Yuichi Nakahara, Teruhiko Kimura
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Patent number: 8171320Abstract: An information processing apparatus having a processing circuit to execute a program by operating at a set operating frequency, including: a measuring section that measures an elapsed time from the user's last operation; a notification section that notifies operation allowing frequencies in the processing circuit and instructs, in response to an elapsed time longer than a predetermined threshold time measured by the measuring section, fixing to a specific low-operating frequency among the operation allowing frequencies and in response to the user's operation in an input section, instructs to release the fixing; and a setting section that selects an operating frequency from among the operation allowing frequencies according to a processing situation and sets the selected operating frequency to the processing circuit and upon release of the fixing, restarts setting of an operating frequency selected from among the operation allowing frequencies, according to a processing situation in the processing circuit.Type: GrantFiled: April 8, 2010Date of Patent: May 1, 2012Assignee: Fujitsu LimitedInventors: Yosuke Konaka, Manabu Keyaki, Teruhiko Kimura
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Publication number: 20100223483Abstract: An information processing apparatus having a processing circuit to execute a program by operating at a set operating frequency, including: a measuring section that measures an elapsed time from the user's last operation; a notification section that notifies operation allowing frequencies in the processing circuit and instructs, in response to an elapsed time longer than a predetermined threshold time measured by the measuring section, fixing to a specific low-operating frequency among the operation allowing frequencies and in response to the user's operation in an input section, instructs to release the fixing; and a setting section that selects an operating frequency from among the operation allowing frequencies according to a processing situation and sets the selected operating frequency to the processing circuit and upon release of the fixing, restarts setting of an operating frequency selected from among the operation allowing frequencies, according to a processing situation in the processing circuit.Type: ApplicationFiled: April 8, 2010Publication date: September 2, 2010Applicant: FUJITSU LIMITEDInventors: Yosuke Konaka, Manabu Keyaki, Teruhiko Kimura
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Patent number: 7615886Abstract: An information apparatus 1 receiving power from a portable power source 16 is provided with an external power receiving section 17 receiving the power by connection to non-portable power sources 20 and 21; an operation section SW switching supply and cutoff of the power from the non-portable power sources 20, 21 that are connected to the portable power source 16 or to the external power receiving section 17; judging sections 11 and 19 for judging, when the information apparatus 1 is activated by the supply of power, whether or not the activation is a first activation since the information apparatus 1 is shipped from a factory; and an informing section 13 for prompting a user to connect the external power receiving section 17 to the non-portable power sources 20 and 21 when the activation is the first activation since the information apparatus 1 is shipped.Type: GrantFiled: December 20, 2005Date of Patent: November 10, 2009Assignee: Fujitsu LimitedInventors: Naoki Iwasa, Teruhiko Kimura
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Publication number: 20070046104Abstract: An information apparatus 1 receiving power from a portable power source 16 is provided with an external power receiving section 17 receiving the power by connection to non-portable power sources 20 and 21; an operation section SW switching supply and cutoff of the power from the non-portable power sources 20, 21 that are connected to the portable power source 16 or to the external power receiving section 17; judging sections 11 and 19 for judging, when the information apparatus 1 is activated by the supply of power, whether or not the activation is a first activation since the information apparatus 1 is shipped from a factory; and an informing section 13 for prompting a user to connect the external power receiving section 17 to the non-portable power sources 20 and 21 when the activation is the first activation since the information apparatus 1 is shipped.Type: ApplicationFiled: December 20, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Naoki Iwasa, Teruhiko Kimura
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Publication number: 20040104463Abstract: A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.Type: ApplicationFiled: September 23, 2003Publication date: June 3, 2004Inventors: Robin E. Gorrell, Mark F. Sylvester, Donald R. Banks, Michael D. Holcomb, William V. Ballard, Kouichi Hirosawa, Sadanobu Satou, Teruhiko Kimura