Patents by Inventor Teruhiko Nagatomo

Teruhiko Nagatomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7471690
    Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: December 30, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuya Asano, Teruhiko Nagatomo, Tomokazu Aoki, Junichi Hashida
  • Patent number: 7154890
    Abstract: A packet transfer device has a layer 2 switch and performs switching by referring to header information of a 3rd layer and higher layers. Input/output ports receives packets from and transmits packets to other devices connected to the packet transfer device. A header information extracting circuit extracts header information belonging to a 3rd layer (network layer) and higher layers of a network protocol from packets inputted from the respective input/output ports. A table stores header information and control information corresponding to the header information in association with each other. A control information acquiring circuit acquires control information corresponding to the header information extracted by the header information extracting circuit from the table. A processing circuit processes packets based on the control information acquired by the control information acquiring circuit.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: December 26, 2006
    Assignee: Fujitsu Limited
    Inventors: Teruhiko Nagatomo, Kazuya Asano, Junichi Hashida
  • Patent number: 6950877
    Abstract: In a packet transmission system including host apparatuses and a router which transfers a packet from host apparatuses in a first host group to host apparatuses in a second host group, each host apparatus in the first host group inserts in a packet an IP address and a link-layer address of a destination host apparatus in the second host group before transmitting the packet. When the router receives the packet, the router determines an output port connected to at least one host apparatus in the second host group including the destination host apparatus, based on the IP address of the destination host apparatus inserted in the packet, and transmits the received packet from the determined output port.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Kazuya Asano, Teruhiko Nagatomo
  • Publication number: 20030202525
    Abstract: A packet transfer apparatus, a scheduler, a data transfer apparatus, and a packet transfer method which can control a transfer rate for each attribute according to an operational situation. When a packet is input, the buffer control circuit determines an attribute of the packet. The input packet is stored by the buffer control circuit in a buffer area which is associated with the determined attribute in advance. Thereafter, when it becomes possible to transmit a packet, the selector refers to information set in a register, and selects a buffer area which has a highest priority among at least one buffer area storing at least one packet. The selection result is sent to the buffer control circuit. Then, buffer control circuit outputs a packet stored in the selected buffer area.
    Type: Application
    Filed: January 15, 2003
    Publication date: October 30, 2003
    Applicant: Fujitsu Limited
    Inventor: Teruhiko Nagatomo
  • Publication number: 20020176426
    Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.
    Type: Application
    Filed: September 26, 2001
    Publication date: November 28, 2002
    Inventors: Kazuya Asano, Teruhiko Nagatomo, Tomokazu Aoki, Junichi Hashida
  • Publication number: 20020161918
    Abstract: In a packet transmission system including host apparatuses and a router which transfers a packet from host apparatuses in a first host group to host apparatuses in a second host group, each host apparatus in the first host group inserts in a packet an IP address and a link-layer address of a destination host apparatus in the second host group before transmitting the packet. When the router receives the packet, the router determines an output port connected to at least one host apparatus in the second host group including the destination host apparatus, based on the IP address of the destination host apparatus inserted in the packet, and transmits the received packet from the determined output port.
    Type: Application
    Filed: July 25, 2001
    Publication date: October 31, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventors: Kazuya Asano, Teruhiko Nagatomo
  • Publication number: 20020159459
    Abstract: A packet transfer device has a layer 2 switch and performs switching by referring to header information of a 3rd layer and higher layers. Input/output ports receives packets from and transmits packets to other devices connected to the packet transfer device. A header information extracting circuit extracts header information belonging to a 3rd layer (network layer) and higher layers of a network protocol from packets inputted from the respective input/output ports. A table stores header information and control information corresponding to the header information in association with each other. A control information acquiring circuit acquires control information corresponding to the header information extracted by the header information extracting circuit from the table. A processing circuit processes packets based on the control information acquired by the control information acquiring circuit.
    Type: Application
    Filed: February 22, 2002
    Publication date: October 31, 2002
    Applicant: Fujitsu Limited
    Inventors: Teruhiko Nagatomo, Kazuya Asano, Junichi Hashida