Patents by Inventor Terumasa Yoneda

Terumasa Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621487
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g., by execution of a “Fill” or other memory-producer instruction).
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: December 31, 2013
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Publication number: 20120151487
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g, by execution of a “Fill” or other memory-producer instruction).
    Type: Application
    Filed: November 14, 2011
    Publication date: June 14, 2012
    Applicants: SHARP KABUSHIKI KAISHA
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Patent number: 8087034
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: December 27, 2011
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Steven J. Frank, Shigeki Imai, Terumasa Yoneda
  • Publication number: 20110145626
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing withing such processor can execute a memory instruction (e.g.
    Type: Application
    Filed: October 26, 2009
    Publication date: June 16, 2011
    Applicants: Sharp Kabushiki Kaisha
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Publication number: 20100162028
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.
    Type: Application
    Filed: October 26, 2009
    Publication date: June 24, 2010
    Applicant: SHARP KABUSHIKI KAISHA CORPORATION
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Patent number: 7653912
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: January 26, 2010
    Assignees: Sharp Corporation
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Publication number: 20040250254
    Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.
    Type: Application
    Filed: May 30, 2003
    Publication date: December 9, 2004
    Inventors: Steven Frank, Shigeki Imai, Terumasa Yoneda
  • Patent number: 4975048
    Abstract: A heating apparatus comprising a heating chamber the inside of which is heated to a fixed temperature and which is provided with an entrance and an exit through which articles to be heated are taken in and out of the heating chamber, a support on which the articles are supported inside and outside of the heating chamber, a conveyer which moves vertically and horizontally so that the top surface of the conveyer is above and below the top surface of the conveyer is above and below the top surface of the support and that the conveyer reciprocates in the direction in which the articles are conveyed, and a pair of doors for opening and closing the entrance and exit of the heating chamber, whereby the articles are successively moved over a fixed distance by the conveyer toward the heating chamber, thereby providing a heating apparatus with a simple structure in which articles such as semiconductor devices are conveyed to the heating chamber without vibration and then properly heated in the heating chamber.
    Type: Grant
    Filed: July 31, 1989
    Date of Patent: December 4, 1990
    Assignees: Sharp Kabushiki Kaisha, Kabushiki Kaisha Excell
    Inventors: Terumasa Yoneda, Akihiko Suzuki, Hiroshi Takakura