Abstract: The differential amplifying circuit includes a first bias resistor having a variable resistance and connected between the first input terminal and the reference voltage node. The differential amplifying circuit includes a second bias resistor having a variable resistance and connected between the second input terminal and the reference voltage node. The differential amplifying circuit includes a controlling circuit that controls the resistance of the first bias resistor and the resistance of the second bias resistor in synchronization with each other.

Abstract: The differential amplifying circuit includes a first bias resistor having a variable resistance and connected between the first input terminal and the reference voltage node. The differential amplifying circuit includes a second bias resistor having a variable resistance and connected between the second input terminal and the reference voltage node. The differential amplifying circuit includes a controlling circuit that controls the resistance of the first bias resistor and the resistance of the second bias resistor in synchronization with each other.

Abstract: According to one embodiment, a digital signal generator includes an amplifying unit, a reference voltage generator and a modulator. The amplifying unit amplifies an analog input signal having a signal level linearly depending on a temperature. The reference voltage generator generates a reference voltage linearly depending on the temperature. The modulator converts the analog input signal amplified by the amplifying unit into a digital output signal based on the reference voltage.

Abstract: According to one embodiment, a semiconductor device provided with an input terminal and a resistor circuit is presented. The resistor circuit is provided with first and second transistors, a first resistor, a capacitor and a capacitor. A drain of the first transistor is connected to the input terminal. One end of the first resistor is connected to a gate of the first transistor. A drain of the second transistor is connected to a source of the first transistor. A gate of the second transistor is connected to the other end of the first resistor. A source of the second transistor is connected to a power supply of a source side. The capacitor is connected between the drain and the gate of the first transistor. The voltage supply circuit is connected to the other end of the first resistor and the gate of the second transistor.

Abstract: According to one embodiment, a semiconductor device provided with an input terminal and a resistor circuit is presented. The resistor circuit is provided with first and second transistors, a first resistor, a capacitor and a capacitor. A drain of the first transistor is connected to the input terminal. One end of the first resistor is connected to a gate of the first transistor. A drain of the second transistor is connected to a source of the first transistor. A gate of the second transistor is connected to the other end of the first resistor. A source of the second transistor is connected to a power supply of a source side. The capacitor is connected between the drain and the gate of the first transistor. The voltage supply circuit is connected to the other end of the first resistor and the gate of the second transistor.

Abstract: A differential amplifying system has a differential amplifier for amplifying a voltage signal inputted from an input terminal and outputting the amplified voltage signal through an output terminal; an amplitude detection circuit for detecting an amplitude of said voltage signal inputted to said differential amplifier and outputting a detected current corresponding to the amplitude; a compensation circuit having: a current mirror circuit for outputting a compensating current at a desired mirror ratio for an input of said detected current; and a feedback circuit for changing a mirror ratio of said current mirror circuit in order to control a magnitude of the compensating current according to an amplitude of the voltage signal detected by said amplitude detection circuit; and a bias circuit for supplying bias voltage to said differential amplifier in order to add a bias value to inputted said voltage signal based on the magnitude of said compensating current.

Abstract: A differential amplifying system has a differential amplifier for amplifying a voltage signal inputted from an input terminal and outputting the amplified voltage signal through an output terminal; an amplitude detection circuit for detecting an amplitude of said voltage signal inputted to said differential amplifier and outputting a detected current corresponding to the amplitude; a compensation circuit having: a current mirror circuit for outputting a compensating current at a desired mirror ratio for an input of said detected current; and a feedback circuit for changing a mirror ratio of said current mirror circuit in order to control a magnitude of the compensating current according to an amplitude of the voltage signal detected by said amplitude detection circuit; and a bias circuit for supplying bias voltage to said differential amplifier in order to add a bias value to inputted said voltage signal based on the magnitude of said compensating current.

Abstract: A radio transceiver encompasses an antenna unit configured to convert the electric wave to the electric signal, a receiver configure to generate the compensation current supplied to load having an output capacity based on the electric signal and the second in-phase signal of an in-phase, a transmitter configured to transmit the signal, and a baseband circuit configured to transmit and to receive of the signal.

Abstract: An aspect of the present invention provides a receiving circuit that includes a mixer configured to receive a signal and a local signal to mix the signals, the mixer configured to convert the signals into an intermediate frequency signal, an IF filter configured to filter the intermediate frequency signal outputted from the mixer, an IF amplifier configured to amplify a band of the intermediate frequency signal outputted from the IF filter, and a demodulation circuit configured to receive a signal outputted from the IF amplifier to carry out demodulation, wherein a part of the demodulation circuit is disposed outside of the receiving circuit.

Abstract: A variable gain amplifier includes a first constant current amplifier configured to generate a reference current from an input signal. A controller is configured to generate a bias current and a first control signal based on control voltage. An addition current generator is configured to generate a variable current from the input signal based on the bias current, and to generate a addition current by controlling the variable current in accordance with the first control signal. An adder is configured to generate a first output signal by adding the reference current and the addition current.

Abstract: A variable gain amplifier includes a first constant current amplifier configured to generate a reference current from an input signal. A controller is configured to generate a bias current and a first control signal based on control voltage. An addition current generator is configured to generate a variable current from the input signal based on the bias current, and to generate a addition current by controlling the variable current in accordance with the first control signal. An adder is configured to generate a first output signal by adding the reference current and the addition current.

Abstract: A differential amplifier comprises an emitter follower, a differential amplifying circuit connected in a succeeding stage to the emitter follower, and a load circuit to compensate distortion of the differential amplifying circuit.

Abstract: An aspect of the present invention provides a receiving circuit that includes a mixer configured to receive a signal and a local signal to mix the signals, the mixer configured to convert the signals into an intermediate frequency signal, an IF filter configured to filter the intermediate frequency signal outputted from the mixer, an IF amplifier configured to amplify a band of the intermediate frequency signal outputted from the IF filter, and a demodulation circuit configured to receive a signal outputted from the IF amplifier to carry out demodulation, wherein a part of the demodulation circuit is disposed outside of the receiving circuit.

Abstract: A radio transceiver encompasses an antenna unit configured to convert the electric wave to the electric signal, a receiver configure to generate the compensation current supplied to load having an output capacity based on the electric signal and the second in-phase signal of an in-phase, a transmitter configured to transmit the signal, and a baseband circuit configured to transmit and to receive of the signal.

Abstract: A differential amplifier comprises an emitter follower, a differential amplifying circuit connected in a succeeding stage to the emitter follower, and a load circuit to compensate distortion of the differential amplifying circuit.

Abstract: A frequency multiplier circuit comprises: a source oscillator configured to generate a source oscillator signal using a crystal oscillator; and n frequency multiplier circuits (n is an integer which is 2 or more), each of which includes a 90° phase shifter circuit configured to shift the phase of an input signal by 90°, and a mixer configured to generate a doubled signal of the input signal on the basis of the input signal and an output signal of the 90° phase shifter circuit, wherein the n frequency multiplier circuits are cascade-connected, the source oscillation signal being inputted to a first stage frequency multiplier circuit of the n frequency multiplier circuits, and a final stage frequency multiplier circuit of the n frequency multiplier circuits outputting a signal having a frequency 2n times as high as the frequency of the source oscillation signal.

Abstract: A frequency multiplier circuit comprises: a source oscillator configured to generate a source oscillator signal using a crystal oscillator; and n frequency multiplier circuits (n is an integer which is 2 or more), each of which includes a 90° phase shifter circuit configured to shift the phase of an input signal by 90°, and a mixer configured to generate a doubled signal of the input signal on the basis of the input signal and an output signal of the 90° phase shifter circuit, wherein the n frequency multiplier circuits are cascade-connected, the source oscillation signal being inputted to a first stage frequency multiplier circuit of the n frequency multiplier circuits, and a final stage frequency multiplier circuit of the n frequency multiplier circuits outputting a signal having a frequency 2n times as high as the frequency of the source oscillation signal.