Patents by Inventor Teruo Itagaki

Teruo Itagaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4800563
    Abstract: In an information processing apparatus, when error of an instruction read out from an instruction storage area is detected, a correct instruction is created and rewritten in the instruction storage area. The rewritten instruction is read out for undergoing again error detection. When error is again detected, decision is made as to whether the error is a fixed one. In the case of the fixed error, a correct instruction is stored in an alternative storage area, while a remedy pattern capable of evading that fixed error is written in the instruction storage area at an address location where the fixed error is detected. The correct instruction corresponding to the remedy pattern is read out from the alternative storage area.
    Type: Grant
    Filed: August 5, 1986
    Date of Patent: January 24, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Teruo Itagaki, Teruo Noro