Patents by Inventor Teruo Jinbo

Teruo Jinbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210297767
    Abstract: An electronic musical instrument according to one embodiment of the present disclosure includes a loudspeaker which releases sounds in a first direction in accordance with an instrument playing operation, an internal component which includes a substrate, a case which houses the loudspeaker and the internal component and has a first region which faces a rear face of the loudspeaker and a second region which faces a rear face of the internal component and does not face the rear face of the loudspeaker, and a sound releasing member which is disposed on an installation face side and in the second region, and releases acoustics in an acoustic space which is formed around the loudspeaker in a second direction which is opposite to the first direction.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 23, 2021
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Ryohei KOBAYASHI, Hiroki AKAI, Teruo JINBO, Kouji OSHIMA, Shingo FUKUSHIMA
  • Patent number: 7390953
    Abstract: With a decimal-fraction address representing a position between two continuous sample values and input from a decimal-fraction address calculation block (5-2) assumed as x, a product-sum block (5-5) calculates the value of x(1?x) as the sum of exclusive logical sums by approximating the value of (1?x) with a value obtained by inverting the values of all the bits representing x. With the use of the thusly obtained value, the waveform sample value (the waveform value) at a waveform position designated by the decimal-fraction address x is calculated, and time-divided DCO outputs are generated by using the calculation result and output to an accumulation block (5-6).
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: June 24, 2008
    Assignee: Casio Computer Co, Ltd.
    Inventor: Teruo Jinbo
  • Publication number: 20070017348
    Abstract: With a decimal-fraction address representing a position between two continuous sample values and input from a decimal-fraction address calculation block (5-2) assumed as x, a product-sum block (5-5) calculates the value of x(1?x) as the sum of exclusive logical sums by approximating the value of (1?x) with a value obtained by inverting the values of all the bits representing x. With the use of the thusly obtained value, the waveform sample value (the waveform value) at a waveform position designated by the decimal-fraction address x is calculated, and time-divided DCO outputs are generated by using the calculation result and output to an accumulation block (5-6).
    Type: Application
    Filed: July 19, 2006
    Publication date: January 25, 2007
    Applicant: Casio Computer Co., Ltd.
    Inventor: Teruo Jinbo
  • Patent number: 5691493
    Abstract: A main CPU and a sub CPU take share of executing a tone generating process to generate multiple tone signals on a real-time basis without using an exclusive tone generator. The main CPU and sub CPU are formed on a one-chip LSI, thus facilitating realization of a compact electronic musical instrument. According to another structure, the main CPU executes tone generation while the sub CPU performs an effect process, thereby permitting a one-chip LSI to generate an effect-added musical tone.
    Type: Grant
    Filed: January 7, 1993
    Date of Patent: November 25, 1997
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ryuji Usami, Kosuke Shiba, Koichiro Daigo, Kazuo Ogura, Jun Hosoda, Teruo Jinbo, Takashi Akutsu, Yoshiki Negoro, Yoshito Yamaguchi, Hajime Manabe
  • Patent number: 5584034
    Abstract: A main CPU and a sub CPU take share of executing a tone generating process to generate multiple tone signals on a real-time basis without using an exclusive tone generator. The main CPU and sub CPU are formed on a one-chip LSI, thus facilitating realization of a compact electronic musical instrument. According to another structure, the main CPU executes tone generation while the sub CPU performs an effect process, thereby permitting a one-chip LSI to generate an effect-added musical tone.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 10, 1996
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ryuji Usami, Kosuke Shiba, Koichiro Daigo, Kazuo Ogura, Jun Hosoda, Teruo Jinbo, Takashi Akutsu, Yoshiki Negoro, Yoshito Yamaguchi, Hajime Manabe
  • Patent number: 5283386
    Abstract: A musical-tone signal controlling apparatus includes a processor which executes a musical-tone controlling process on an input musical-tone signal supplied to the processor, the processor including a delay unit which executes a delay process on the input musical-tone signal; a first discriminator which determines whether or not the input musical-tone signal to be supplied to the processor has become null; a second discriminator which determines whether or not the output musical-tone signal processed by the processor has become null; and a reset circuit which automatically resets the delay unit when the second discriminator determines that the musical-tone signal processed by the processor has become null after the first discriminator determines that the input musical-tone signal to be supplied to the processor has become null.
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: February 1, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Takashi Akutsu, Teruo Jinbo, Hitoshi Kato, Naoaki Itoh
  • Patent number: 5200564
    Abstract: A main CPU and a sub CPU take share of executing a tone generating process to generate multiple tone signals on a real-time basis without using an exclusive tone generator. The main CPU and sub CPU are formed on a one-chip LSI, thus facilitating realization of a compact electronic musical instrument. According to another structure, the main CPU executes tone generation while the sub CPU performs an effect process, thereby permitting a one-chip LSI to generate an effect-added musical tone.
    Type: Grant
    Filed: May 29, 1991
    Date of Patent: April 6, 1993
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ryuji Usami, Kosuke Shiba, Koichiro Daigo, Kazuo Ogura, Jun Hosoda, Teruo Jinbo, Takashi Akutsu, Yoshiki Negoro, Yoshito Yamaguchi, Hajime Manabe
  • Patent number: 5127306
    Abstract: An apparatus for producing panned tones comprises tone generator for generating a plurality of tone signals, the tone generator including a plurality of channels each for generating one of the plurality of tone signals. The plurality of tone signals generated by the tone generator are grouped into a plurality of groups. A pan setting device is provided for setting, for each of the plurality of groups, a manner of how the respective groups are pan-controlled. A pan effecting device is provided for automatically pan controlling said each of the plurality of groups based on respective settings of the pan setting device so that tone panning effects are produced according to each of the plurality of groups. The pan setting device sets characteristic for each of the plurality of groups to move a location of a formed sound image periodically when the plurality of groups of tone signals is output.
    Type: Grant
    Filed: October 2, 1991
    Date of Patent: July 7, 1992
    Assignee: Casio Computer Co., Ltd.
    Inventors: Akio Mitsuhashi, Teruo Jinbo