Patents by Inventor Teruyuki Shimura

Teruyuki Shimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140232467
    Abstract: A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1, and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7. The driver-stage amplifier 3 is fabricated on a silicon substrate 11, while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 21, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji Mukai, Kenichi Horiguchi, Morishige Hieda, Katsuya Kato, Yoshihito Hirano, Kazuya Yamamoto, Hiroyuki Joba, Teruyuki Shimura
  • Patent number: 7907009
    Abstract: Provided is a high frequency amplifier including two amplifying elements of different element sizes connected in parallel and switching the amplifying elements in accordance with a level of output power. In particular, the high frequency amplifier includes an output matching circuit for matching to characteristic impedance (50 ohms) both when the output power is high and low, and increasing impedance when the turned-off amplifying element is viewed from a connection node on an output side of the two amplifying elements. Consequently, characteristics such as high output power and high efficiency can be achieved and it is possible to prevent an amplified high frequency signal from passing around to a matching circuit on a turned-off amplifying element side.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: March 15, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazutomi Mori, Kazuhiro Iyomasa, Akira Ohta, Teruyuki Shimura, Masatoshi Nakayama
  • Publication number: 20100033241
    Abstract: Provided is a high frequency amplifier including two amplifying elements of different element sizes connected in parallel and switching the amplifying elements in accordance with a level of output power. In particular, the high frequency amplifier includes an output matching circuit for matching to characteristic impedance (50 ohms) both when the output power is high and low, and increasing impedance when the turned-off amplifying element is viewed from a connection node on an output side of the two amplifying elements. Consequently, characteristics such as high output power and high efficiency can be achieved and it is possible to prevent an amplified high frequency signal from passing around to a matching circuit on a turned-off amplifying element side.
    Type: Application
    Filed: November 30, 2006
    Publication date: February 11, 2010
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazutomi Mori, Kazuhiro Iyomasa, Akira Ohta, Teruyuki Shimura, Masatoshi Nakayama
  • Patent number: 7605648
    Abstract: A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 ?m. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 ?m.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 20, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Satoshi Suzuki, Tomoyuki Asada, Takayuki Matsuzuka, Teruyuki Shimura
  • Publication number: 20090027130
    Abstract: A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 ?m. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 ?m.
    Type: Application
    Filed: November 30, 2007
    Publication date: January 29, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Satoshi Suzuki, Tomoyuki Asada, Takayuki Matsuzuka, Teruyuki Shimura
  • Patent number: 7145397
    Abstract: Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: December 5, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuya Yamamoto, Teruyuki Shimura, Tomoyuki Asada, Satoshi Suzuki
  • Patent number: 6861906
    Abstract: A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: March 1, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Shintaro Shinjo, Kousei Maemura, Teruyuki Shimura, Kazuhiko Nakahara, Tadashi Takagi
  • Publication number: 20050030106
    Abstract: Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
    Type: Application
    Filed: July 13, 2004
    Publication date: February 10, 2005
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Kazuya Yamamoto, Teruyuki Shimura, Tomoyuki Asada, Satoshi Suzuki
  • Patent number: 6683512
    Abstract: A high frequency module according to the present invention comprises a laminate board having a plurality of dielectric layers (11 to 18) stacked one on another, a branch filter circuit (DIP10) for separating a plurality of transceiver systems from each other, switch circuits (SW10, SW20) for switching the respective transceiver systems between transmitter branches (TX) and receiver branches (RX), power amplifiers (AMP10, AMP20) each comprising a matching circuit (MAT10, MAT20) and a high frequency amplification semiconductor device for amplifying a transmission signal having a frequency within a pass band of each of the transmitter branches (TX), and couplers (COP10, COP20) for monitoring outputs.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: January 27, 2004
    Assignee: Kyocera Corporation
    Inventors: Katsurou Nakamata, Shinji Isoyama, Teruyuki Shimura, Toshio Okuda
  • Publication number: 20030218500
    Abstract: An amplification part of a power amplifier includes first to third amplifier stages and a signal transmission part provided in parallel with the first amplifier stage. When a mode select voltage Vmod2 is set to the L level, an input signal is amplified by the first to third amplifier stages. At this time, the signal transmission part does not transmit signals. On the other hand, when mode select voltage Vmod2 is set to the H level, the signal transmission part transmits the input signal to a transistor via a diode. At this time, a control voltage Vmod1800 is set to the L level, and the first amplifier stage is turned off, so that power consumption is reduced. Thus, a power amplifier capable of switching a gain in accordance with GSM/EDGE modes while suppressing noise power in a reception band can be provided.
    Type: Application
    Filed: November 19, 2002
    Publication date: November 27, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Kazuya Yamamoto, Teruyuki Shimura, Tomoyuki Asada, Satoshi Suzuki
  • Publication number: 20030011435
    Abstract: A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.
    Type: Application
    Filed: September 3, 2002
    Publication date: January 16, 2003
    Inventors: Kazutomi Mori, Shintaro Shinjo, Kousei Maemura, Teruyuki Shimura, Kazuhiko Nakahara, Tadashi Takagi
  • Publication number: 20020196085
    Abstract: A high frequency module according to the present invention comprises a laminate board having a plurality of dielectric layers (11 to 18) stacked one on another, a branch filter circuit (DIP10) for separating a plurality of transceiver systems from each other, switch circuits (SW10, SW20) for switching the respective transceiver systems between transmitter branches (TX) and receiver branches (RX), power amplifiers (AMP10, AMP20) each comprising a matching circuit (MAT10, MAT20) and a high frequency amplification semiconductor device for amplifying a transmission signal having a frequency within a pass band of each of the transmitter branches (TX), and couplers (COP10, COP20) for monitoring outputs.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 26, 2002
    Applicant: KYOCERA CORPORATION
    Inventors: Katsurou Nakamata, Shinji Isoyama, Teruyuki Shimura, Toshio Okuda
  • Patent number: 6271098
    Abstract: A heterojunction bipolar transistor is provided with a ballast resistor layer in an emitter layer which prevents the current amplification factor &bgr; from decreasing. The n-GaAs carrier supply layer having a specified carrier concentration is formed between the ballast resistor layer and the n-AlGaAs layer.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: August 7, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinichi Miyakuni, Teruyuki Shimura
  • Patent number: 6081003
    Abstract: A heterojunction bipolar transistor is provided with a ballast resistor layer in an emitter layer which prevents the current amplification factor .beta. from decreasing. The n-GaAs carrier supply layer having a specified carrier concentration is formed between the ballast resistor layer and the n-AlGaAs layer.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: June 27, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinichi Miyakuni, Teruyuki Shimura
  • Patent number: 5973543
    Abstract: A bias circuit for a bipolar transistor includes a constant voltage source connected to a base electrode of the bipolar transistor; and a resistor connected in series between the constant voltage source and the base electrode of the bipolar transistor. By selecting an appropriate resistance for this resistor, the bias point moves due to a change in the voltage drop across the resistor. The change occurs because the base current flowing through the resistor changes, whereby the operating class of the transistor changes, resulting in a high efficiency at a desired output power.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: October 26, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Teruyuki Shimura
  • Patent number: 5889434
    Abstract: A microwave power amplifier having n stages (n is an integer of at least two), which uses bipolar transistors as amplifying elements. Grounded electrodes, bias applying methods, and bias values of the bipolar transistors of the respective stages are set so that phase rotations of output powers of bipolar transistors of m stages (m is an integer of 1.ltoreq.m.ltoreq.n-1) among the n stages are canceled by phase rotation of at least one of the other bipolar transistors of the (n-m) stages. Therefore, the total phase rotation of the power amplifier can be neutralized, resulting in a microwave power amplifier having excellent distortion characteristics.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: March 30, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Teruyuki Shimura, Takeshi Miura, Tadashi Takagi
  • Patent number: 5864169
    Abstract: A semiconductor device includes a semiconductor substrate having opposite front and rear surfaces; a semiconductor element disposed on the front surface of the semiconductor substrate and including an electrode; a PHS for dissipating heat generated in the semiconductor element, the PHS including a metal layer and disposed on the rear surface of the semiconductor substrate; a via-hole including a through-hole penetrating through the semiconductor substrate from the front surface to the rear surface and having an inner surface, and a metal disposed in the through-hole and contacting the PHS; and an air-bridge wiring including a metal film and having first and second portions, the air-bridge contacting the electrode of the semiconductor element at the first portion and contacting the metal of the via-hole at the second portion.
    Type: Grant
    Filed: July 19, 1995
    Date of Patent: January 26, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Teruyuki Shimura, Masayuki Sakai, Ryo Hattori, Hiroshi Matsuoka, Manabu Katoh
  • Patent number: 5793067
    Abstract: An electrode lead of a transistor extends beyond other electrode leads of the transistor, is disposed adjacent to the corresponding electrode, and is disposed outside the other electrode leads for heat radiation. A wider part of the electrode lead may have a via hole or a thick metal plating for heat radiation. Further, the electrode is preferably grounded and is connected to an external input terminal to which heat is transferred.
    Type: Grant
    Filed: July 5, 1996
    Date of Patent: August 11, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takeshi Miura, Teruyuki Shimura, Manabu Katoh
  • Patent number: 5760457
    Abstract: A bipolar transistor circuit element includes a semiconductor substrate; successively disposed on the substrate, a base layer, an emitter layer, and a collector layer; a bipolar transistor formed from parts of the collector, base, and emitter layers and including a base electrode electrically connected to the base layer and a base electrode pad for making an external connection to the base layer; a base ballasting resistor formed from a part of the base layer isolated from the bipolar transistor and electrically connecting the base electrode to the base electrode pad; and a base parallel capacitor connected in parallel with the base ballasting resistor wherein the base parallel capacitor includes part of the base input pad, a dielectric film disposed on part of the base electrode pad, and a second electrode disposed on the dielectric layer opposite the base electrode pad and electrically connected to the emitter electrode of the bipolar transistor.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: June 2, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Mitsui, Takuji Sonoda, Teruyuki Shimura, Saburo Takamiya
  • Patent number: 5726468
    Abstract: A semiconductor device includes a semiconductor substrate; a first active layer disposed on the semiconductor substrate; a second active layer disposed on the first active layer; a first electrode including a lower stage disposed on the second active layer and an upper stage disposed on the lower stage and having an overhanging portion protruding from the lower stage; an insulating film continuously covering a surface of the second active layer, a side surface of the lower stage of the first electrode, and a lower surface and a side surface of the overhanging portion of the upper stage; and a second electrode disposed on the surface of the first active layer at opposite sides of the second active layer, self-aligned with the second active layer. The distance between the second electrode and the second active layer is minimized and the thickness of the second electrode can be about 7000 .ANG., minimizing the resistance of the first active layer and improving high frequency characteristics.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: March 10, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomoki Oku, Hirofumi Nakano, Shinichi Miyakuni, Teruyuki Shimura, Ryo Hattori