Patents by Inventor Tetsu Toda

Tetsu Toda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220140748
    Abstract: An inverter device includes first and second input terminals, a series circuit having a plurality of switch elements coupled between the first and second input terminals. Each of the switch elements is coupled in parallel with a series circuit having a diode and an inductor.
    Type: Application
    Filed: November 5, 2020
    Publication date: May 5, 2022
    Inventors: Tetsu TODA, Tatsuo HARADA, Daisuke IIJIMA, Syuuichi KIKUCHI, Kotaro KURODA
  • Patent number: 10396547
    Abstract: To realize a reduction in the number of parts in a system including a driver IC (semiconductor device). A high potential side power supply voltage is applied to a power supply application area. A high side area is formed with a circuit which includes a driver driving a high side transistor and is operated at a boot power supply voltage with a floating voltage as a reference. A low side area is formed with a circuit operated at a power supply voltage with a low potential side power supply voltage as a reference. A first termination area is disposed in a ring form so as to surround the power supply application area. A second termination area is disposed in a ring form so as to surround the high side area.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: August 27, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryo Kanda, Hiroshi Kuroiwa, Tetsu Toda, Yasushi Nakahara
  • Patent number: 10224921
    Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 5, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Ryo Kanda, Koichi Yamazaki, Hiroshi Kuroiwa, Masatoshi Maeda, Tetsu Toda
  • Patent number: 10008919
    Abstract: A method of controlling a power supply to a semiconductor device including a first region having a high-side drive circuit, a second region having a signal processing circuit, a low-side drive circuit and a voltage control circuit, and a separation region formed between the first and second regions and having a rectifying element, includes turning on a first control signal to the voltage control circuit, turning off the first control signal to the voltage control circuit, and repeating the turning on of the first control signal and the turning off the first control signal.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: June 26, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Azuma Araya, Ryo Kanda, Tomonobu Kurihara, Tetsu Toda
  • Patent number: 10008561
    Abstract: A semiconductor device including a first circuit region in which a first circuit whose power supply potential is a first voltage is formed; a second circuit region in which a second circuit whose power supply potential is a second voltage lower than the first voltage is formed a separation region which separates the first circuit region from the second circuit region; and a transistor which is located in the separation region and couples the second circuit to the first circuit and whose source and drain are of a first conductivity type, the separation region including an element separation film; a first field plate which overlaps with the element separation film in plan view; a plurality of conductive films which are provided over the first field plate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 26, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Ryo Kanda, Tetsu Toda
  • Publication number: 20180076614
    Abstract: To realize a reduction in the number of parts in a system including a driver IC (semiconductor device). A high potential side power supply voltage is applied to a power supply application area. A high side area is formed with a circuit which includes a driver driving a high side transistor and is operated at a boot power supply voltage with a floating voltage as a reference. A low side area is formed with a circuit operated at a power supply voltage with a low potential side power supply voltage as a reference. A first termination area is disposed in a ring form so as to surround the power supply application area. A second termination area is disposed in a ring form so as to surround the high side area.
    Type: Application
    Filed: September 12, 2017
    Publication date: March 15, 2018
    Inventors: Ryo KANDA, Hiroshi KUROIWA, Tetsu TODA, Yasushi NAKAHARA
  • Patent number: 9866207
    Abstract: A driver integrated circuit includes a bootstrap circuit (BSC) configured to output a boot power supply voltage (VB) based on a first power supply voltage, the boot power supply voltage being higher than the first power supply voltage; a level shift circuit (LSC) configured to output an output pulse signal based on an input pulse signal and the boot power supply voltage; a high side driving circuit (HSU) configured to output a high side driving voltage based on the boot power supply voltage and the output pulse signal, wherein the bootstrap circuit includes a sense metal oxide semiconductor (MOS) transistor and a boot MOS transistor, wherein the sense MOS transistor includes a depression-type transistor.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: January 9, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Ryo Kanda, Tetsu Toda, Junichi Nakamura, Kazuyuki Umezu, Tomonobu Kurihara, Takahiro Nagatsu, Yasushi Nakahara, Yoshinori Kaya
  • Publication number: 20170170819
    Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: Ryo KANDA, Koichi YAMAZAKI, Hiroshi KUROIWA, Masatoshi MAEDA, Tetsu TODA
  • Publication number: 20170104474
    Abstract: A driver integrated circuit includes a bootstrap circuit (BSC) configured to output a boot power supply voltage (VB) based on a first power supply voltage, the boot power supply voltage being higher than the first power supply voltage; a level shift circuit (LSC) configured to output an output pulse signal based on an input pulse signal and the boot power supply voltage; a high side driving circuit (HSU) configured to output a high side driving voltage based on the boot power supply voltage and the output pulse signal, wherein the bootstrap circuit includes a sense metal oxide semiconductor (MOS) transistor and a boot MOS transistor, wherein the sense MOS transistor includes a depression-type transistor.
    Type: Application
    Filed: December 21, 2016
    Publication date: April 13, 2017
    Inventors: Ryo KANDA, Tetsu TODA, Junichi NAKAMURA, Kazuyuki UMEZU, Tomonobu KURIHARA, Takahiro NAGATSU, Yasushi NAKAHARA, Yoshinori KAYA
  • Patent number: 9621151
    Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been deteLutined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: April 11, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryo Kanda, Koichi Yamazaki, Hiroshi Kuroiwa, Masatoshi Maeda, Tetsu Toda
  • Patent number: 9559687
    Abstract: In order to reduce the cost and the like of a power control device including a semiconductor device such as a driver IC, as well as an electronic system, the driver IC includes a high side driver, a level shift circuit, first and second transistors, and a comparator circuit. The first transistor is formed in a termination area. The second transistor is formed in the termination region and is driven by a first power supply voltage. The comparator circuit is formed in a first region to drive the first transistor to be ON when the voltage of a sense node is lower than the first power supply voltage, while driving the first transistor to be OFF when the voltage of the sense node is higher than the first power supply voltage. The second transistor is a depression type transistor.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: January 31, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Ryo Kanda, Tetsu Toda, Junichi Nakamura, Kazuyuki Umezu, Tomonobu Kurihara, Takahiro Nagatsu, Yasushi Nakahara, Yoshinori Kaya
  • Publication number: 20170019093
    Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.
    Type: Application
    Filed: May 17, 2016
    Publication date: January 19, 2017
    Inventors: Ryo KANDA, Koichi Yamazaki, Hiroshi Kuroiwa, Masatoshi Maeda, Tetsu Toda
  • Publication number: 20160164398
    Abstract: A method of controlling a power supply to a semiconductor device including a first region having a high-side drive circuit, a second region having a signal processing circuit, a low-side drive circuit and a voltage control circuit, and a separation region formed between the first and second regions and having a rectifying element, includes turning on a first control signal to the voltage control circuit, turning off the first control signal to the voltage control circuit, and repeating the turning on of the first control signal and the turning off the first control signal.
    Type: Application
    Filed: February 12, 2016
    Publication date: June 9, 2016
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Azuma Araya, Ryo Kanda, Tomonobu Kurihara, Tetsu Toda
  • Publication number: 20160148995
    Abstract: A semiconductor device including a first circuit region in which a first circuit whose power supply potential is a first voltage is formed; a second circuit region in which a second circuit whose power supply potential is a second voltage lower than the first voltage is formed a separation region which separates the first circuit region from the second circuit region; and a transistor which is located in the separation region and couples the second circuit to the first circuit and whose source and drain are of a first conductivity type, the separation region including an element separation film; a first field plate which overlaps with the element separation film in plan view; a plurality of conductive films which are provided over the first field plate.
    Type: Application
    Filed: December 21, 2015
    Publication date: May 26, 2016
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Ryo Kanda, Tetsu Toda
  • Patent number: 9343453
    Abstract: A field plate electrode is repetitively disposed in a folded manner or a spiral shape in a direction along an edge of a first circuit region. A coupling transistor couples a first circuit to a second circuit lower in supply voltage than the first circuit. A second conductivity type region is disposed around the coupling transistor. A part of the field plate electrode partially overlaps with the second conductivity type region. The field plate electrode is electrically coupled to a drain electrode of the coupling transistor at a portion located on the first circuit region side from a center thereof in a width direction of the separation region. A ground potential or a power potential of the second circuit is applied to the field plate electrode at a portion located on the second conductivity type region side from the center.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: May 17, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryo Kanda, Tetsu Toda, Yasushi Nakahara, Yoshinori Kaya
  • Patent number: 9324862
    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: April 26, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Ryo Kanda, Tetsu Toda
  • Patent number: 9287256
    Abstract: Provided is a semiconductor device including a substrate of a first conductivity type, a first circuit region, a separation region, a second circuit region, and a rectifying element. The rectifying element has a second conductivity type layer, a first high concentration second conductivity type region, a second high concentration second conductivity type region, an element isolation film, a first insulation layer, and a first conductive film. A first contact is coupled to the first high concentration second conductivity type region, and a second contact is coupled to the second high concentration second conductivity type region. A third contact is coupled to the first conductive film. The first contact, the second contact and the third contact are separated from each other.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: March 15, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Azuma Araya, Ryo Kanda, Tomonobu Kurihara, Tetsu Toda
  • Publication number: 20160056818
    Abstract: In order to reduce the cost and the like of a power control device including a semiconductor device such as a driver IC, as well as an electronic system, the driver IC includes a high side driver, a level shift circuit, first and second transistors, and a comparator circuit. The first transistor is formed in a termination area. The second transistor is formed in the termination region and is driven by a first power supply voltage. The comparator circuit is formed in a first region to drive the first transistor to be ON when the voltage of a sense node is lower than the first power supply voltage, while driving the first transistor to be OFF when the voltage of the sense node is higher than the first power supply voltage. The second transistor is a depression type transistor.
    Type: Application
    Filed: August 21, 2015
    Publication date: February 25, 2016
    Inventors: Ryo KANDA, Tetsu TODA, Junichi NAKAMURA, Kazuyuki UMEZU, Tomonobu KURIHARA, Takahiro NAGATSU, Yasushi NAKAHARA, Yoshinori KAYA
  • Publication number: 20150270390
    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 24, 2015
    Inventors: Yoshinori Kaya, Yasushi Nakahara, Ryo Kanda, Tetsu Toda
  • Publication number: 20150262990
    Abstract: A field plate electrode is repetitively disposed in a folded manner or a spiral shape in a direction along an edge of a first circuit region. A coupling transistor couples a first circuit to a second circuit lower in supply voltage than the first circuit. A second conductivity type region is disposed around the coupling transistor. A part of the field plate electrode partially overlaps with the second conductivity type region. The field plate electrode is electrically coupled to a drain electrode of the coupling transistor at a portion located on the first circuit region side from a center thereof in a width direction of the separation region. A ground potential or a power potential of the second circuit is applied to the field plate electrode at a portion located on the second conductivity type region side from the center.
    Type: Application
    Filed: May 15, 2015
    Publication date: September 17, 2015
    Inventors: Ryo KANDA, Tetsu TODA, Yasushi NAKAHARA, Yoshinori KAYA