Patents by Inventor Tetsuhiko Endoh

Tetsuhiko Endoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7827468
    Abstract: A volatile memory has a volatile additional area for storing an error correction code for a nonvolatile memory. Data stored in the nonvolatile memory are transferred to the volatile memory together with the error correction code without making an error correction. Thus, data transfer time from the nonvolatile memory to the volatile memory can be shortened. As a result, it is possible to shorten the time from beginning of the data transfer from the nonvolatile memory to the volatile memory to a point at which data becomes accessible.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: November 2, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yoshiharu Kato, Yoshihiro Takemae, Toshio Ogawa, Tetsuhiko Endoh, Yoshinori Okajima
  • Patent number: 7388791
    Abstract: Plural transmitter units generate plural currents corresponding to plural logical values, respectively, and propagate the currents to a common signal line. The common signal line synthesizes the currents generated by the transmitter units, and propagates them to a receiver unit as a synthetic current. The receiver unit restores the logical values the transmitter units generated, in accordance with the synthetic current. The values of the currents the transmitter units generate in correspondence with the logical values each differ, so that the value of the synthetic current can be changed for every combination of logical values. Accordingly, the receiver unit can restore the logical values outputted from the respective transmitter units, based on the synthetic current. That is, employing the common signal line enables signals transmitted from the transmitter units to be simultaneously received. Consequently, the number of signal lines laid between the transmitter units and the receiver unit is reduced.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: June 17, 2008
    Assignee: Fujitsu Limited
    Inventors: Yoshiharu Kato, Yoshihiro Takemae, Toshio Ogawa, Tetsuhiko Endoh, Yoshinori Okajima
  • Publication number: 20070091989
    Abstract: Plural transmitter units generate plural currents corresponding to plural logical values, respectively, and propagate the currents to a common signal line. The common signal line synthesizes the currents generated by the transmitter units, and propagates them to a receiver unit as a synthetic current. The receiver unit restores the logical values the transmitter units generated, in accordance with the synthetic current. The values of the currents the transmitter units generate in correspondence with the logical values each differ, so that the value of the synthetic current can be changed for every combination of logical values. Accordingly, the receiver unit can restore the logical values outputted from the respective transmitter units, based on the synthetic current. That is, employing the common signal line enables signals transmitted from the transmitter units to be simultaneously received. Consequently, the number of signal lines laid between the transmitter units and the receiver unit is reduced.
    Type: Application
    Filed: October 19, 2006
    Publication date: April 26, 2007
    Inventors: Yoshiharu Kato, Yoshihiro Takemae, Toshio Ogawa, Tetsuhiko Endoh, Yoshinori Okajima
  • Publication number: 20070091678
    Abstract: A volatile memory has a volatile additional area for storing an error correction code for a nonvolatile memory. Data stored in the nonvolatile memory are transferred to the volatile memory together with the error correction code without making an error correction. Thus, data transfer time from the nonvolatile memory to the volatile memory can be shortened. As a result, it is possible to shorten the time from beginning of the data transfer from the nonvolatile memory to the volatile memory to a point at which data becomes accessible.
    Type: Application
    Filed: October 19, 2006
    Publication date: April 26, 2007
    Inventors: Yoshiharu Kato, Yoshihiro Takemae, Toshio Ogawa, Tetsuhiko Endoh, Yoshinori Okajima
  • Patent number: 6052742
    Abstract: An interface between a card-type peripheral device and a host machine, such as a PC, determines the operational supply voltage required to operate the peripheral device prior to the host machine supplying the operational supply voltage to the peripheral device. The host machine first receives information stored on the peripheral device specifying the operational voltage required to operate the peripheral device. The host machine then generates the proper operational supply voltage and provides it to the peripheral device. The interface prevents damage to the peripheral device due to the host machine supplying an incorrect operational voltage.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: April 18, 2000
    Assignee: Fujitsu Limited
    Inventors: Masaki Kirinaka, Hiroaki Watanabe, Tetsuhiko Endoh, Ryuji Tanaka
  • Patent number: 5025415
    Abstract: A memory card is used on a card write and/or read apparatus which has a data bus with an arbitrary bit width and writes and/or reads a datum to and/or from the memory card.
    Type: Grant
    Filed: September 25, 1989
    Date of Patent: June 18, 1991
    Assignees: Fujitsu Limited, Fujitsu Vlsi Limited
    Inventors: Masaru Masuyama, Yoshihiro Takemae, Tetsuhiko Endoh, Hirosuke Komyoji, Ryuji Tanaka, Katsuhiko Itakura