Patents by Inventor Tetsuhiro Koyama

Tetsuhiro Koyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094064
    Abstract: Before a temperature characteristic of a band gap reference circuit is tested, temperature dependencies of a reference voltage and an absolute temperature proportional voltage for a plurality of samples are measured. When the temperature characteristic is tested, based on a difference ?Vref between the reference voltage of the band gap reference circuit at a predetermined temperature and a median value of the reference voltages of the plurality of samples, a difference ?Vptat between the absolute temperature proportional voltage of the band gap reference circuit at a predetermined temperature and a median value of the absolute temperature proportional voltages of the plurality of samples is calculated.
    Type: Application
    Filed: July 17, 2023
    Publication date: March 21, 2024
    Inventors: Tadashi KAMEYAMA, Fumiki KAWAKAMI, Tetsuhiro KOYAMA, Masataka MINAMI
  • Patent number: 10670478
    Abstract: It is possible to detect a failure in a temperature sensor while preventing enlarging of a circuit scale. A temperature measurement circuit 10 includes temperature sensors 20 and 30, and a comparator 40. The temperature sensor 20 includes a temperature detection unit 21 including a resistive element, a resistance value of which varies in accordance with temperature changes, and an AD converter which converts a voltage of the temperature detection unit 21 into a temperature digital value D1. The temperature sensor 30 includes a ring oscillator 31 which oscillates at a cycle that is temperature dependent, and generates a digital value D2 based on an oscillating signal output by the ring oscillator 31. The comparator 40 compares the temperature digital values D1 and D2, and outputs a signal indicating whether the temperature sensor 20 is normal or not based on a comparison result.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: June 2, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Chiaki Kumahara, Tetsuhiro Koyama, Masaaki Hirano
  • Publication number: 20180156675
    Abstract: It is possible to detect a failure in a temperature sensor while preventing enlarging of a circuit scale. A temperature measurement circuit 10 includes temperature sensors 20 and 30, and a comparator 40. The temperature sensor 20 includes a temperature detection unit 21 including a resistive element, a resistance value of which varies in accordance with temperature changes, and an AD converter which converts a voltage of the temperature detection unit 21 into a temperature digital value D1. The temperature sensor 30 includes a ring oscillator 31 which oscillates at a cycle that is temperature dependent, and generates a digital value D2 based on an oscillating signal output by the ring oscillator 31. The comparator 40 compares the temperature digital values D1 and D2, and outputs a signal indicating whether the temperature sensor 20 is normal or not based on a comparison result.
    Type: Application
    Filed: October 26, 2017
    Publication date: June 7, 2018
    Inventors: Chiaki KUMAHARA, Tetsuhiro KOYAMA, Masaaki HIRANO
  • Patent number: 7973694
    Abstract: An analog-digital converter according to the present invention includes an input polarity switching unit, an integrator that integrates an input signal, an integrator output adjusting circuit that adjusts an output voltage of the integrator, a window comparator, and a controller that controls the input polarity switching unit, the integrator output adjusting circuit, and the window comparator, and generates a digital signal. When the output voltage of the integrator reaches a first reference voltage, the controller resets reference voltage of a high-voltage side comparator to a second reference voltage. Further, when the output voltage of the integrator reaches a third reference voltage, the controller resets reference voltage of a low-voltage side comparator to a fourth reference voltage. According to the analog-digital converter of the present invention, it is possible to prevent device breakdown and occurrence of through current due to fluctuation of the output voltage of the integrator.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: July 5, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tetsuhiro Koyama
  • Patent number: 7956778
    Abstract: There is provided an analog-to-digital converter capable of performing analog-to-digital conversion with good accuracy. The analog-to-digital converter in accordance with the present invention includes a dither generation circuit 11 which generates dither; an input polarity switching unit 1 which switches a polarity of an input signal; an integrator 2; an integrator output regulator circuit 5 which regulates an output voltage of the integrator 2; a window comparator 3; a control circuit 4 which uses the comparison result of the window comparator 3 to control the input polarity switching unit 1, the integrator output regulator circuit 5, and the window comparator 3 as well as to generate a digital signal. The dither generation circuit 11 generates dither in such a manner that a cycle in which the digital signal is read is an integral multiple of a dither cycle.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tetsuhiro Koyama
  • Publication number: 20100214141
    Abstract: There is provided an analog-to-digital converter capable of performing analog-to-digital conversion with good accuracy. The analog-to-digital converter in accordance with the present invention includes a dither generation circuit 11 which generates dither; an input polarity switching unit 1 which switches a polarity of an input signal; an integrator 2; an integrator output regulator circuit 5 which regulates an output voltage of the integrator 2; a window comparator 3; a control circuit 4 which uses the comparison result of the window comparator 3 to control the input polarity switching unit 1, the integrator output regulator circuit 5, and the window comparator 3 as well as to generate a digital signal. The dither generation circuit 11 generates dither in such a manner that a cycle in which the digital signal is read is an integral multiple of a dither cycle.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 26, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tetsuhiro Koyama
  • Publication number: 20100214147
    Abstract: An analog-digital converter according to the present invention includes an input polarity switching unit, an integrator that integrates an input signal, an integrator output adjusting circuit that adjusts an output voltage of the integrator, a window comparator, and a controller that controls the input polarity switching unit, the integrator output adjusting circuit, and the window comparator, and generates a digital signal. When the output voltage of the integrator reaches a first reference voltage, the controller resets reference voltage of a high-voltage side comparator to a second reference voltage. Further, when the output voltage of the integrator reaches a third reference voltage, the controller resets reference voltage of a low-voltage side comparator to a fourth reference voltage. According to the analog-digital converter of the present invention, it is possible to prevent device breakdown and occurrence of through current due to fluctuation of the output voltage of the integrator.
    Type: Application
    Filed: February 17, 2010
    Publication date: August 26, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tetsuhiro KOYAMA
  • Patent number: 7696910
    Abstract: According to one aspect of the present invention, there is provided a dither circuit including a dither generating circuit generating a plurality of complementary signal pairs, and a dither input circuit generating a plurality of dither signals from the plurality of complementary signal pairs to add the generated dither signals to an analog input signal, in which the plurality of complementary signal pairs have different frequencies with each other, the dither input circuit includes capacitors provided for each of the plurality of complementary signal pairs and a plurality of switch pairs including first and second switches having one terminals connected to each one terminal of the capacitors, and the other terminals of the capacitors are connected to an adding point to the analog input signal, the first switch supplies ones of the complementary signal pairs to one terminals of the capacitors when a clock signal is in effective state, and the second switch supplies the others of the complementary signal pairs
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 13, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Tetsuhiro Koyama
  • Patent number: 7525369
    Abstract: A semiconductor circuit apparatus includes a booster which is connected to a single power supply and outputs a power supply voltage of the power supply or a voltage different from the power supply voltage, and a boost controller which controls whether to output the power supply voltage of the power supply or the voltage different from the power supply voltage.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: April 28, 2009
    Assignee: NEC Electronics Corporation
    Inventors: Tetsuhiro Koyama, Tetsuya Matsumoto
  • Publication number: 20080238743
    Abstract: According to one aspect of the present invention, there is provided a dither circuit including a dither generating circuit generating a plurality of complementary signal pairs, and a dither input circuit generating a plurality of dither signals from the plurality of complementary signal pairs to add the generated dither signals to an analog input signal, in which the plurality of complementary signal pairs have different frequencies with each other, the dither input circuit includes capacitors provided for each of the plurality of complementary signal pairs and a plurality of switch pairs including first and second switches having one terminals connected to each one terminal of the capacitors, and the other terminals of the capacitors are connected to an adding point to the analog input signal, the first switch supplies ones of the complementary signal pairs to one terminals of the capacitors when a clock signal is in effective state, and the second switch supplies the others of the complementary signal pairs
    Type: Application
    Filed: February 29, 2008
    Publication date: October 2, 2008
    Inventor: Tetsuhiro Koyama
  • Publication number: 20060267670
    Abstract: A semiconductor circuit apparatus includes a booster which is connected to a single power supply and outputs a power supply voltage of the power supply or a voltage different from the power supply voltage, and a boost controller which controls whether to output the power supply voltage of the power supply or the voltage different from the power supply voltage.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 30, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Tetsuhiro Koyama, Tetsuya Matsumoto