Patents by Inventor Tetsuhiro Tanaka

Tetsuhiro Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150287831
    Abstract: A semiconductor device includes an oxide semiconductor film, a source electrode, a drain electrode, a gate insulating film, a gate electrode, and an insulating film. The source electrode includes a region in contact with the oxide semiconductor film. The drain electrode includes a region in contact with the oxide semiconductor film. The gate insulating film is provided between the oxide semiconductor film and the gate electrode. The insulating film is provided over the gate electrode and over the gate insulating film. The insulating film includes a first portion and a second portion. The first portion includes a step portion. The second portion includes a non-step portion. The first portion includes a portion with a first thickness. The second portion includes a portion with a second thickness. The second thickness is larger than or equal to 1.0 time and smaller than or equal to 2.0 times the first thickness.
    Type: Application
    Filed: April 2, 2015
    Publication date: October 8, 2015
    Inventors: Tetsuhiro TANAKA, Yujiro SAKURADA, Yutaka OKAZAKI
  • Patent number: 9153436
    Abstract: In a semiconductor device in which a channel formation region is included in an oxide semiconductor layer, an oxide insulating film below and in contact with the oxide semiconductor layer and a gate insulating film over and in contact with the oxide semiconductor layer are used to supply oxygen of the gate insulating film, which is introduced by an ion implantation method, to the oxide semiconductor layer.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: October 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Shinya Sasagawa, Tetsuhiro Tanaka
  • Patent number: 9153537
    Abstract: A semiconductor film having an impurity region to which at least an n-type or p-type impurity is added and a wiring are provided. The wiring includes a diffusion prevention film containing a conductive metal oxide, and a low resistance conductive film over the diffusion prevention film. In a contact portion between the wiring and the semiconductor film, the diffusion prevention film and the impurity region are in contact with each other. The diffusion prevention film is framed in such a manner that a conductive film is exposed to plasma generated from a mixed gas of an oxidizing gas and a halogen-based gas to form an oxide of a metal material contained in the conductive film, the conductive film in which the oxide of the metal material is formed is exposed to an atmosphere containing water to be fluidized, and the fluidized conductive film is solidified.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: October 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuhiro Tanaka
  • Publication number: 20150236166
    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Inventors: Motomu KURATA, Shinya SASAGAWA, Taiga MURAOKA, Tetsuhiro TANAKA, Junichi KOEZUKA
  • Publication number: 20150214328
    Abstract: To provide a semiconductor device with low parasitic capacitance, a semiconductor device with low power consumption, a semiconductor device having favorable frequency characteristics, or a highly integrated semiconductor device. In a method of manufacturing a semiconductor device including a semiconductor, a first conductor, a second conductor, a third conductor, and an insulator, the semiconductor includes a first region in contact with the first conductor, a second region in contact with the second conductor, and a third region in contact with the insulator. The third conductor includes a region in which the third conductor and the semiconductor overlap with each other with the insulator interposed therebetween. The first region, the second region, and the third region do not overlap with each other. The first conductor is selectively grown over the first region, and the second conductor is selectively grown over the second region.
    Type: Application
    Filed: January 15, 2015
    Publication date: July 30, 2015
    Inventor: Tetsuhiro Tanaka
  • Publication number: 20150187952
    Abstract: To provide a transistor with stable electrical characteristics, a transistor with a low off-state current, a transistor with a high on-state current, a semiconductor device including the transistor, or a durable semiconductor device. The semiconductor device includes a first transistor using silicon, an aluminum oxide film over the first transistor, and a second transistor using an oxide semiconductor over the aluminum oxide film. The oxide semiconductor has a lower hydrogen concentration than silicon.
    Type: Application
    Filed: December 23, 2014
    Publication date: July 2, 2015
    Inventors: Shunpei Yamazaki, Tetsuhiro Tanaka, Hideomi Suzawa, Yasumasa Yamane, Yuhei Sato, Sachiaki Tezuka
  • Publication number: 20150179810
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film. In the antioxidant film, a width of a region overlapping with the pair of electrodes is longer than a width of a region not overlapping with the pair of electrodes.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 25, 2015
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Tetsuhiro Tanaka, Masashi Tsubuku, Toshihiko Takeuchi, Ryo Tokumaru, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toshiya Endo
  • Publication number: 20150179803
    Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 25, 2015
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshitaka Yamamoto, Hideomi Suzawa, Tetsuhiro Tanaka, Yutaka Okazaki, Naoki Okuno, Takahisa Ishiyama
  • Publication number: 20150162449
    Abstract: To reduce oxygen vacancies in an oxide semiconductor film and the vicinity of the oxide semiconductor film and to improve electric characteristics of a transistor including the oxide semiconductor film. A semiconductor device includes a gate electrode whose Gibbs free energy for oxidation is higher than that of a gate insulating film. In a region where the gate electrode is in contact with the gate insulating film, oxygen moves from the gate electrode to the gate insulating film, which is caused because the gate electrode has higher Gibbs free energy for oxidation than the gate insulating film. The oxygen passes through the gate insulating film and is supplied to the oxide semiconductor film in contact with the gate insulating film, whereby oxygen vacancies in the oxide semiconductor film and the vicinity of the oxide semiconductor film can be reduced.
    Type: Application
    Filed: February 12, 2015
    Publication date: June 11, 2015
    Inventors: Hiromichi GODO, Tetsuhiro TANAKA
  • Patent number: 9048327
    Abstract: An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm3 and lower than or equal to 2.35 g/cm3, preferably higher than or equal to 2.30 g/cm3 and lower than or equal to 2.33 g/cm3.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Takashi Ienaga, Ryu Komatsu, Erika Kato, Ryota Tajima, Yasuhiro Jinbo
  • Patent number: 9048321
    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Tetsuhiro Tanaka, Junichi Koezuka
  • Publication number: 20150140732
    Abstract: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over the gate electrode, and an oxide semiconductor film is formed over the gate insulating film, the gate insulating film is formed by deposition treatment using high-density plasma. Accordingly, dangling bonds in the gate insulating film are reduced and the quality of the interface between the gate insulating film and the oxide semiconductor is improved.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 21, 2015
    Inventors: Mitsuhiro ICHIJO, Tetsuhiro TANAKA, Seiji YASUMOTO, Shun MASHIRO, Yoshiaki OIKAWA, Kenichi OKAZAKI
  • Publication number: 20150108472
    Abstract: A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having small current in an off state (in a non-conductive state) is provided. A semiconductor device including such a transistor is provided. A first electrode is formed over a substrate, a first insulating layer is formed adjacent to a side surface of the first electrode, and a second insulating layer is formed to cover the first insulating layer and be in contact with at least part of a surface of the first electrode. The surface of the first electrode is formed of a conductive material that does not easily transmit an impurity element. The second insulating layer is formed of an insulating material that does not easily transmit an impurity element. An oxide semiconductor layer is formed over the first electrode with a third insulating layer provided therebetween.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 23, 2015
    Inventors: Hideomi Suzawa, Tetsuhiro Tanaka, Yuhei Sato, Sachiaki Tezuka, Shunpei Yamazaki
  • Publication number: 20150084044
    Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2? of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 26, 2015
    Inventors: Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE
  • Publication number: 20150076496
    Abstract: A semiconductor device includes a gate electrode having higher Gibbs free energy for oxidation than a gate insulating film. An oxide semiconductor layer having a fin shape is formed over an insulating surface, a gate insulating film is formed over the oxide semiconductor layer, a gate electrode including an oxide layer and facing top and side surfaces of the oxide semiconductor layer with the gate insulating film located therebetween is formed, and then by performing heat treatment, a gate electrode is reduced and oxygen is supplied to the oxide semiconductor layer through the gate insulating film.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 19, 2015
    Inventors: Tetsuhiro Tanaka, Hiromichi Godo
  • Patent number: 8981370
    Abstract: A semiconductor device which has stable electrical characteristics and high reliability is provided. The semiconductor device includes a gate electrode over an insulating surface, a gate insulating film over the gate electrode, a semiconductor film which is over the gate insulating film and overlaps with the gate electrode, and a protective insulating film over the semiconductor film; and the protective insulating film includes a crystalline insulating film and an aluminum oxide film over the crystalline insulating film.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: March 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Erika Takahashi
  • Publication number: 20150069387
    Abstract: A method for manufacturing a semiconductor device with adjusted threshold is provided. In a semiconductor device including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is provided, a charge trap layer provided between the first gate electrode and the semiconductor, and a gate insulating layer provided between the second gate electrode and the semiconductor, a threshold is increased by trapping electrons in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the source or drain electrode for 1 second or more while heating. After the threshold adjustment process, the first gate electrode is removed or insulated from other circuits. Alternatively, a resistor may be provided between the first gate electrode and other circuits.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 12, 2015
    Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA, Yasuhiko TAKEMURA
  • Publication number: 20150069385
    Abstract: A method for adjusting threshold of a semiconductor device is provided. In a plurality of semiconductor devices each including a semiconductor, a source or drain electrode electrically in contact with the semiconductor, a gate electrode, and a charge trap layer between a gate electrode and the semiconductor, a state where the potential of the gate electrode is set higher than the potential of the source or drain electrode while the semiconductor devices are heated at 150° C. or higher and 300° C. or lower is kept for one second or longer to trap electrons in the charge trap layer, so that the threshold is increased and Icut is reduced. Here, the potential difference between the gate electrode and the source or drain electrode is set so that it is different between the semiconductor devices, and the thresholds of the semiconductor devices are adjusted to be appropriate to each purpose.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA
  • Publication number: 20150060846
    Abstract: A semiconductor device in which the threshold is adjusted is provided. In a transistor including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the semiconductor, the electron trap layer includes crystallized hafnium oxide. The crystallized hafnium oxide is deposited by a sputtering method using hafnium oxide as a target. When the substrate temperature is Tsub (° C.) and the proportion of oxygen in an atmosphere is P (%) in the sputtering method, P?45?0.15×Tsub is satisfied. The crystallized hafnium oxide has excellent electron trapping properties. By the trap of an appropriate number of electrons, the threshold of the semiconductor device can be adjusted.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA
  • Patent number: 8969130
    Abstract: An amorphous region with low density is formed in an oxide insulating film containing zirconium. The amount of oxygen released from such an oxide insulating film containing zirconium by heating is large and a temperature at which oxygen is released is higher in the oxide insulating film than in a conventional oxide film (e.g., a silicon oxide film). When the insulating film is formed using a sputtering target containing zirconium in an oxygen atmosphere, the temperature of a surface on which the insulating film is formed may be controlled to be lower than a temperature at which a film to be formed starts to crystallize.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Erika Takahashi, Yuki Imoto, Yuhei Sato