Abstract: An in-circuit emulator comprising a microprocessor having an input terminal for selecting whether or not the data obtained by accessing an external address should be registered in the cache memory, a register for storing an address for discontinuing the execution of the microprocessor, and a comparator for comparing an address outputted from the microprocessor with the address stored in the register. When the result of comparison is indicative of coincidence, the comparator outputs a coincidence output signal to the above mentioned terminal of the microprocessor, so that the data is inhibited from being registered into the cache memory. Therefore, an external access is performed for the address discontinuing the execution, and accordingly, a break address can be detected by a device external to the microprocessor.

Abstract: An error controller for use in a debugging microprocessor includes a bus error detection circuit for generating an exception request signal when an external bus error signal is supplied through an external input terminal and an exception control circuit responding to the exception request signal so as to control an exception processing. A double bus error detection circuit receives the external bus error signal for stopping an operation of a microprocessor when the external bus error signal is detected in the way of the exception processing. A bus error status saving circuit is provided for controlling the bus error detection circuit so as to save, when an interrupt request is given through a debug interrupt request terminal, a bus error status held in the bus error detection circuit indicating that the exception processing for the bus error is being executed when the interrupt request is given, so that the bus error detection circuit is brought into a condition of no bus error.