Patents by Inventor Tetsuji Tsuda

Tetsuji Tsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR APPARATUS, PROCESSOR SYSTEM, AND CONTROL METHOD THEREOF
    Publication number: 20170147252
    Abstract: A processor system (10) includes: a first memory controller (16) that controls writing/reading data to/from a first memory (60); a second memory controller (17) that controls writing/reading data to/from a second memory (70); a first processor (13) that inputs and outputs the data from and to the first memory through a bus (14); a second processor (11) that inputs and outputs processed data from and to the second memory through the bus; and a management unit 32 that deallocates an address range corresponding to the second memory from the first process and allocates the address range to the second processor.
    Type: Application
    Filed: February 8, 2017
    Publication date: May 25, 2017
    Inventors: Tetsuji TSUDA, Yoshiyuki ITO
  • Semiconductor apparatus, processor system, and control method for deallocating and allocating an address range corresponding to a memory between different processors of the processor system
    Patent number: 9619407
    Abstract: A processor system (10) includes: a first memory controller (16) that controls writing/reading data to/from a first memory (60); a second memory controller (17) that controls writing/reading data to/from a second memory (70); a first processor (13) that inputs and outputs the data from and to the first memory through a bus (14); a second processor (11) that inputs and outputs processed data from and to the second memory through the bus; and a management unit 32 that deallocates an address range corresponding to the second memory from the first process and allocates the address range to the second processor.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: April 11, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Tetsuji Tsuda, Yoshiyuki Ito
  • SEMICONDUCTOR DEVICE
    Publication number: 20170046069
    Abstract: A semiconductor device includes a central processing unit and a processor on one semiconductor substrate. The processor includes a buffer for storing a register setting list and notifies the central processing unit of an access complete signal indicating completion of reading the register setting list. The central processing unit changes the register setting list within a memory based on the access complete signal and notifies the processor of an update request signal. The processor reads the register setting list changed by the central processing unit into the buffer based on the update request information.
    Type: Application
    Filed: June 4, 2016
    Publication date: February 16, 2017
    Inventors: Tetsuji TSUDA, Masaru Hase, Yuki Inoue, Naohiro Nishikawa
  • SEMICONDUCTOR APPARATUS, PROCESSOR SYSTEM, AND CONTROL METHOD THEREOF
    Publication number: 20150220282
    Abstract: A processor system (10) includes: a first memory controller (16) that controls writing/reading data to/from a first memory (60); a second memory controller (17) that controls writing/reading data to/from a second memory (70); a first processor (13) that inputs and outputs the data from and to the first memory through a bus (14); a second processor (11) that inputs and outputs processed data from and to the second memory through the bus; and a management unit 32 that deallocates an address range corresponding to the second memory from the first process and allocates the address range to the second processor.
    Type: Application
    Filed: January 9, 2015
    Publication date: August 6, 2015
    Inventors: Tetsuji Tsuda, Yoshiyuki Ito