Patents by Inventor Tetsumasa Meguro

Tetsumasa Meguro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7643365
    Abstract: A semiconductor integrated circuit able to operate by different power supply voltages resulting from fluctuations in production, provided with a process monitor circuit for obtaining a grasp of a delay characteristic corresponding to the conditions of a production process, a memory circuit for storing data concerning an extent of process variation acquired by the process monitor circuit, and a power supply voltage control circuit for adaptively controlling the power supply voltage in accordance with the extent of process variation acquired by the process monitor circuit and stored in the memory circuit, and a test method for guaranteeing the operation of the semiconductor integrated circuit.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: January 5, 2010
    Assignee: Sony Corporation
    Inventors: Tetsumasa Meguro, Yoshikazu Kurose
  • Patent number: 7356726
    Abstract: A frequency control apparatus and an information processing apparatus includes an observation section for observing an operation state of a control object which operates with a variably controlled frequency, a frequency determination section for determining a clock frequency in response to the operation state, and a frequency limitation section for limiting a range or a value of the clock frequency determined by the frequency determination section. If the frequency determined in response to the operation state of the control object is within an allowable range, the control is performed with the frequency, but if the frequency is outside the allowable range, the frequency is limited to the range.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: April 8, 2008
    Assignee: Sony Corporation
    Inventors: Takeshi Shimoyama, Tetsumasa Meguro, Tsutomu Teranishi, Yasuo Nakano, Hirokazu Kawahara
  • Patent number: 7265590
    Abstract: A semiconductor apparatus for flexibly and effectively configuring a delay monitor circuit without an increase in circuit scale includes a delay signal generation circuit for switching the configuration of delay element arrays based on first configuration information and second configuration information and propagating a delay element array wherein a pulse is switched, a register group having a first register for the first configuration information and a second register for second configuration information, a selector for outputting to the delay signal generation circuit the first configuration information and second configuration information in accordance with an instruction of a selection signal in a time sharing way, and a control circuit for controlling a power source voltage based on delay information of a delay element array and outputting to the selector a selection signal to select from the first configuration information and second configuration information in a time sharing way.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: September 4, 2007
    Assignee: Sony Corporation
    Inventors: Takahiro Seki, Masakatsu Nakai, Tetsumasa Meguro
  • Publication number: 20060212247
    Abstract: A frequency control apparatus and an information processing apparatus are disclosed wherein it is possible, in control of an operation frequency of a control object performed in response to a result of observation of an operation state of the control object, to limit the operation frequency or designate an allowable value or the like to achieve improvement in performance and power-saving. The frequency control apparatus (1) includes an observation section (3) for observing an operation state of a control object (2) which operates with a variably controlled frequency, a frequency determination section (4) for determining a clock frequency in response to the operation state, and a frequency limitation section (5) for limiting a range or a value of the clock frequency determined by the frequency determination section (4).
    Type: Application
    Filed: May 7, 2004
    Publication date: September 21, 2006
    Applicant: Sony Corporation
    Inventors: Takeshi Shimoyama, Tetsumasa Meguro, Tsutomu Teranishi, Yasuo Nakano, Hirokazu Kawahara
  • Publication number: 20050254325
    Abstract: A semiconductor integrated circuit able to operate by different power supply voltages resulting from fluctuations in production, provided with a process monitor circuit for obtaining a grasp of a delay characteristic corresponding to the conditions of a production process, a memory circuit for storing data concerning an extent of process variation acquired by the process monitor circuit, and a power supply voltage control circuit for adaptively controlling the power supply voltage in accordance with the extent of process variation acquired by the process monitor circuit and stored in the memory circuit, and a test method for guaranteeing the operation of the semiconductor integrated circuit.
    Type: Application
    Filed: April 29, 2005
    Publication date: November 17, 2005
    Applicant: Sony Corporation
    Inventors: Tetsumasa Meguro, Yoshikazu Kurose
  • Patent number: 6801074
    Abstract: A clock switching circuit is provided for switching from a first clock signal being output to a freely selected second clock signal among a plurality of clock signals having different frequencies and phases while preventing generation of a hazard. The switching circuit has a plurality of unit circuits for respectively receiving as an input the clock signals, selection signals of the clock signals and enabling signals and controls supplying and stopping of the clock signals in accordance with the selection signals and the enabling signals. A feedback circuit monitors output conditions of the plurality of unit circuits and, when outputting of all clock signals of the plurality of unit circuits was stopped as a result of stopping the first clock signal, giving a plurality of the unit circuits the enabling signal for approving starting of a supply of the second clock signal.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: October 5, 2004
    Assignee: Sony Corporation
    Inventor: Tetsumasa Meguro
  • Patent number: 6784716
    Abstract: A clock generation circuit for generating clocks having a plurality of frequencies by which a suitable frequency for each task can be supplied such that the power consumption is reduced. A clock generation unit is provided for generating a clock with a constant frequency, with a counter operating in synchronization with the clock for counting pulses of the clock, a comparator for comparing a counter value of the counter with the number of pulses of a clock having a desired frequency, and an output gate for controlling the supply and stopping of pulses of the clock input from the clock generation unit based on a comparison result of the comparator.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: August 31, 2004
    Assignee: Sony Corporation
    Inventor: Tetsumasa Meguro
  • Patent number: 6778418
    Abstract: A power-supply voltage frequency control circuit capable of changing a clock frequency in accordance with processing and assuring an operation of a target circuit when supplying a power-supply voltage in accordance therewith, comprising a clock supply circuit capable of supplying a system clock of a plurality of clock frequencies and supplying a system clock having a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock, a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit, and a control circuit for outputting the first control signal to the clock supply circuit and a second control signal to the power-supply voltage supply circuit by following an instruction of a frequency change value and a change time from the target circuit.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 17, 2004
    Assignee: Sony Corporation
    Inventor: Tetsumasa Meguro
  • Publication number: 20040130372
    Abstract: A semiconductor apparatus for flexibly and effectively configuring a delay monitor circuit while suppressing an increase of the circuit scale to minimum, comprising a delay signal generation circuit for switching the configuration of delay element arrays based on first configuration information and second configuration information and propagating a delay element array wherein a pulse is switched, a register group having a first register to be set the first configuration information and a second register to be set second configuration information, a selector for outputting to the delay signal generation circuit the first configuration information and second configuration information in accordance with an instruction of a selection signal in a time sharing way, and a control circuit for controlling a power source voltage based on delay information of a delay element array and outputting to the selector a selection signal to select from the first configuration information and second configuration information in
    Type: Application
    Filed: November 14, 2003
    Publication date: July 8, 2004
    Inventors: Takahiro Seki, Masakatsu Nakai, Tetsumasa Meguro
  • Publication number: 20040090808
    Abstract: A power-supply voltage frequency control circuit capable of changing a clock frequency in accordance with processing and assuring an operation of a target circuit when supplying a power-supply voltage in accordance therewith, comprising a clock supply circuit capable of supplying a system clock of a plurality of clock frequencies and supplying a system clock having a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock, a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit, and a control circuit for outputting the first control signal to the clock supply circuit and a second control signal to the power-supply voltage supply circuit by following an instruction of a frequency change value and a change time from the target circuit.
    Type: Application
    Filed: November 12, 2002
    Publication date: May 13, 2004
    Inventor: Tetsumasa Meguro
  • Publication number: 20040012435
    Abstract: A clock switching circuit for switching a first clock signal being output to a freely selected second clock signal among a plurality of clock signals having different frequencies and phases while preventing generation of a hazard, comprising a plurality of unit circuits for respectively receiving as an input the clock signals, selection signals of the clock signals and enabling signals and controlling supplying and stopping of the clock signals in accordance with the selection signals and the enabling signals; and a feedback circuit for monitoring output conditions of the plurality of unit circuits and, when outputting of all clock signals of the plurality of unit circuits was stopped as a result of stopping the first clock signal, giving a plurality of the unit circuits the enabling signals for approving starting of a supply of the second clock signal.
    Type: Application
    Filed: July 15, 2003
    Publication date: January 22, 2004
    Inventor: Tetsumasa Meguro
  • Publication number: 20040000939
    Abstract: A clock generation circuit for generating clocks having a plurality of frequencies by which a suitable frequency to each of tasks can be supplied and the power consumption is reduced, comprising a clock generation unit for generating a clock with a constant frequency, a counter operating in synchronization with the clock for counting pulses of the clock, a comparator for comparing a counter value of the counter with the number of pulses of a clock having a desired frequency, and an output gate for controlling supply and stop of pulses of the clock input from the clock generation unit based on a comparison result of the comparator.
    Type: Application
    Filed: May 6, 2003
    Publication date: January 1, 2004
    Inventor: Tetsumasa Meguro