Patents by Inventor Tetsunori Maruyama
Tetsunori Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240322046Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.Type: ApplicationFiled: May 28, 2024Publication date: September 26, 2024Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
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Publication number: 20240254616Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: ApplicationFiled: April 12, 2024Publication date: August 1, 2024Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Tetsunori MARUYAMA, Yuki IMOTO, Hitomi SATO, Masahiro WATANABE, Mitsuo MASHIYAMA, Kenichi OKAZAKI, Motoki NAKASHIMA, Takashi SHIMAZU
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Patent number: 11959165Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: GrantFiled: April 13, 2021Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tetsunori Maruyama, Yuki Imoto, Hitomi Sato, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Takashi Shimazu
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Publication number: 20230094969Abstract: Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×1020 atoms/cm3 or less is provided.Type: ApplicationFiled: December 2, 2022Publication date: March 30, 2023Inventors: Junichiro SAKATA, Tetsunori MARUYAMA, Yuki IMOTO
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Patent number: 11545579Abstract: Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×1020 atoms/cm3 or less is provided.Type: GrantFiled: October 9, 2020Date of Patent: January 3, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto
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Patent number: 11387116Abstract: In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.Type: GrantFiled: March 2, 2020Date of Patent: July 12, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yuhei Sato, Keiji Sato, Tetsunori Maruyama, Junichi Koezuka
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Publication number: 20220037532Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.Type: ApplicationFiled: October 19, 2021Publication date: February 3, 2022Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
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Patent number: 11217703Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.Type: GrantFiled: June 18, 2020Date of Patent: January 4, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Toriumi, Takashi Hamada, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Ryunosuke Honda, Shunpei Yamazaki
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Publication number: 20210230740Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: ApplicationFiled: April 13, 2021Publication date: July 29, 2021Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Tetsunori MARUYAMA, Yuki IMOTO, Hitomi SATO, Masahiro WATANABE, Mitsuo MASHIYAMA, Kenichi OKAZAKI, Motoki NAKASHIMA, Takashi SHIMAZU
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Patent number: 11066739Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: GrantFiled: February 26, 2019Date of Patent: July 20, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tetsunori Maruyama, Yuki Imoto, Hitomi Sato, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Takashi Shimazu
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Publication number: 20210036160Abstract: Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×1020 atoms/cm3 or less is provided.Type: ApplicationFiled: October 9, 2020Publication date: February 4, 2021Inventors: Junichiro SAKATA, Tetsunori MARUYAMA, Yuki IMOTO
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Patent number: 10889888Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: GrantFiled: June 22, 2016Date of Patent: January 12, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tetsunori Maruyama, Yuki Imoto, Hitomi Sato, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Takashi Shimazu
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Publication number: 20200357925Abstract: A minute transistor is provided. A semiconductor device includes a semiconductor over a substrate, a first conductor and a second conductor over the semiconductor, a first insulator over the first conductor and the second conductor, a second insulator over the semiconductor, a third insulator over the second insulator, and a third conductor over the third insulator. The third insulator is in contact with a side surface of the first insulator. The semiconductor includes a first region where the semiconductor overlaps with a bottom surface of the first conductor, a second region where the semiconductor overlaps with a bottom surface of the second conductor, and a third region where the semiconductor overlaps with a bottom surface of the third conductor. The length between a top surface of the semiconductor and the bottom surface of the third conductor is longer than the length between the first region and the third region.Type: ApplicationFiled: June 18, 2020Publication date: November 12, 2020Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
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Patent number: 10804409Abstract: Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×1020 atoms/cm3 or less is provided.Type: GrantFiled: October 12, 2018Date of Patent: October 13, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto
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Publication number: 20200203183Abstract: In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.Type: ApplicationFiled: March 2, 2020Publication date: June 25, 2020Inventors: Shunpei YAMAZAKI, Yuhei SATO, Keiji SATO, Tetsunori MARUYAMA, Junichi KOEZUKA
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Patent number: 10693013Abstract: A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.Type: GrantFiled: April 5, 2016Date of Patent: June 23, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Toriumi, Takashi Hamada, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Ryunosuke Honda, Shunpei Yamazaki
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Patent number: 10615052Abstract: In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.Type: GrantFiled: May 29, 2018Date of Patent: April 7, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yuhei Sato, Keiji Sato, Tetsunori Maruyama, Junichi Koezuka
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Patent number: 10388520Abstract: A method of forming an oxide semiconductor includes a step of depositing an oxide semiconductor layer over a substrate by using a sputtering apparatus in which in a target containing indium, an element M (aluminum, gallium, yttrium, or tin), zinc, and oxygen, the substrate which faces a surface of the target, and a magnet unit comprising a first magnet and a second magnet on a rear surface side of the target are provided. In the method, deposition is performed under a condition that a maximum intensity of a horizontal magnetic field is greater than or equal to 350 G and less than or equal to 2000 G in a plane where a vertical distance toward the substrate from a surface of the magnet unit is 10 mm.Type: GrantFiled: December 23, 2014Date of Patent: August 20, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshinori Yamada, Tetsunori Maruyama
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Publication number: 20190185986Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: ApplicationFiled: February 26, 2019Publication date: June 20, 2019Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Tetsunori MARUYAMA, Yuki IMOTO, Hitomi SATO, Masahiro WATANABE, Mitsuo MASHIYAMA, Kenichi OKAZAKI, Motoki NAKASHIMA, Takashi SHIMAZU
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Publication number: 20190051754Abstract: Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×1020 atoms/cm3 or less is provided.Type: ApplicationFiled: October 12, 2018Publication date: February 14, 2019Inventors: Junichiro SAKATA, Tetsunori MARUYAMA, Yuki IMOTO