Patents by Inventor Tetsunori Wada

Tetsunori Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9229226
    Abstract: Analysis of an electromagnetic wave traveling in an optical device, can be performed quickly and correctly. A structure forming process simulator forms an analysis structure of a physical object to be analyzed. A hybrid optical simulator calculates time-independent data and time-dependent data of an electromagnetic field by dividing the analysis structure into parts, determining whether a metallic or magnetic material is included in each of the divided parts, and selectively applying a Beam Propagation Method (BPM) or a Finite Difference Time Domain (FDTD) method to the divided parts. A storage device stores the time-independent data and the time-dependent data output from the hybrid optical simulator as hybrid electric field data. Related methods are also described.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: January 5, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-Wook Yi, Masatomo Nakazato, Tetsunori Wada, Hyun-joo Kim, Young-kwan Park, Jae-sung Shin
  • Publication number: 20120330630
    Abstract: Analysis of an electromagnetic wave traveling in an optical device, can be performed quickly and correctly. A structure forming process simulator forms an analysis structure of a physical object to be analyzed. A hybrid optical simulator calculates time-independent data and time-dependent data of an electromagnetic field by dividing the analysis structure into parts, determining whether a metallic or magnetic material is included in each of the divided parts, and selectively applying a Beam Propagation Method (BPM) or a Finite Difference Time Domain (FDTD) method to the divided parts. A storage device stores the time-independent data and the time-dependent data output from the hybrid optical simulator as hybrid electric field data. Related methods are also described.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 27, 2012
    Inventors: Shin-Wook Yi, Masatomo Nakazato, Tetsunori Wada, Hyun-joo Kim, Young-kwan Park, Jae-sung Shin
  • Patent number: 7580904
    Abstract: A chromosome using each of a plurality of parameters of a physical model of a semiconductor element as a gene is defined and the parameters are optimized using a genetic algorithm based on the characteristics measurement data of the semiconductor element fabricated by way of trial. In the selection processing of the genetic algorithm, a sum of a first evaluation value based on linear scale data and a second evaluation value based on logarithmic scale data is employed as the evaluation value of the chromosome.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: August 25, 2009
    Assignee: Evolvable Systems Research Institute Inc.
    Inventors: Masahiro Murakawa, Keiichi Ito, Tetsunori Wada
  • Publication number: 20060158287
    Abstract: A chromosome using each of a plurality of parameters of a physical model of a semiconductor element as a gene is defined and the parameters are optimized using a genetic algorithm based on the characteristics measurement data of the semiconductor element fabricated by way of trial. In the selection processing of the genetic algorithm, a sum of a first evaluation value based on linear scale data and a second evaluation value based on logarithmic scale data is employed as the evaluation value of the chromosome.
    Type: Application
    Filed: July 15, 2004
    Publication date: July 20, 2006
    Applicant: Evolvable Systems Research
    Inventors: Masahiro Murakawa, Keiichi Ito, Tetsunori Wada
  • Publication number: 20060010091
    Abstract: In a solution search apparatus, a parameter search range input part acquires a search range of a parameter, and stores it in a parameter search range storing part. Then, with respect to the search range of the parameter stored in the parameter search range storing part, a parameter setting part sets initial values of the parameter so that logarithmic values of parameter values may become a uniform distribution and a normal distribution for at least a part of the search range of the parameter, and stores them in the parameter storing part. A search part reads the parameter stored in the parameter storing part and searches for a solution by a predetermined algorithm.
    Type: Application
    Filed: December 20, 2004
    Publication date: January 12, 2006
    Inventor: Tetsunori Wada
  • Publication number: 20050267851
    Abstract: An optimization method for extracting a model parameter in a semiconductor circuit. A fitness function circuit 15 installed in a genetic algorithm machine 900 is provided with an evaluated value calculation section 21, which receives an offspring model parameter from an offspring model parameter file 44, obtains k model evaluated values based on the offspring model parameter received, and stores the k model evaluated values in an evaluated value file 32 in a storage section 17. The fitness function circuit 15 is also provided with an area calculation section 22, which reads the k model evaluated values stored in the evaluated value file 32 by the evaluated value calculation section 21, calculates the size of an area formed by the k model evaluated values read, and stores the size of the area in an area value file 33 in the storage section 17.
    Type: Application
    Filed: January 19, 2005
    Publication date: December 1, 2005
    Inventors: Shunsuke Baba, Tetsunori Wada
  • Patent number: 5463234
    Abstract: A semiconductor memory device, in particular a dynamic random access memory cell which realizes a high speed thereof and presenting a superior controllability. The dynamic random access memory (DRAM) cell includes: a first transistor; a second transistor, electrically connected in series to the first transistor, for storing an electric charge, the second transistor including a portion for erasing the charge stored at the second transistor, wherein the first transistor and the second transistor are electrically connected between a power line and a bit line; and a diode electrically connected between the first transistor and the second transistor.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: October 31, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Toriumi, Naoyuki Shigyo, Tetsunori Wada, Hiroyoshi Tanimoto, Kazuya Ohuchi, Makoto Yoshimi
  • Patent number: 4969116
    Abstract: A method of generating a discretization grid for a finite-difference simulation capable of simulating an object with a complex cross-sectional configuration accurately is disclosed. The method includes the step of generating grid through each vertex of the polygonal figure representing the cross-sectional configuration, and the step of generating additional grid through each intersection of the grid and the segments of the polygonal figure not parallel to the grid.
    Type: Grant
    Filed: September 28, 1988
    Date of Patent: November 6, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsunori Wada, Shinji Oosawa