Patents by Inventor Tetsuo Aoki

Tetsuo Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7724249
    Abstract: Terminal equipment for electronically making patent and utility patent applications. The terminal equipment converts various formats of text data generated by an external device into the internal format of the terminal equipment, retrieves the converted text data, merges the text data with a procedure, and transmits the procedure. The merging operation in which image data is merged with text data is simplified whereby the operator can make applications with a simple operation without special skill and knowledge when an application document is transmitted and received on line.
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: May 25, 2010
    Assignee: Fujitsu Limited
    Inventors: Akira Horikawa, Masanori Kawaguchi, Hirotoshi Umemura, Tetsuo Aoki, Atsurou Noguchi, Kouichi Masaki, Akihiko Shigeta, Kiyoshi Ohi, Kiyoshi Inoue, Yasuhiro Tameie, Naruhito Yamamoto, Hiroshi Aihara, Masahiko Senda
  • Patent number: 5517207
    Abstract: A method and a system for driving an electro-luminescence display panel of a matrix type has a compensation pulse applied to all the cells prior to or in the front of a pedestal pulse on every frame cycle. The level of the compensation pulse is higher than the pedestal pulse but low enough not to light the cells by itself. The duration of the compensation pulse is long enough to saturate charge polarization in the EL material of the cell, as a dielectric, at the applied voltage. Therefore, brightness of the lighted cell is kept constant regardless of the number of lighted cells on the same data electrode. Each of two power-receiving terminals of push-pull scan drivers is connected to a pulse generator respectively. One of the two power-receiving terminals may be floated from the pulse generator while data pulse is applied to the data electrodes.
    Type: Grant
    Filed: September 8, 1994
    Date of Patent: May 14, 1996
    Assignee: Fujitsu Limited
    Inventors: Toyoshi Kawada, Tetsuya Kobayashi, Hisashi Yamaguchi, Tetsuo Aoki, Hiroyuki Miyata
  • Patent number: 5196738
    Abstract: A data driver circuit of TFT-LCD having a plurality of power source voltage terminals with different voltage levels, an output terminal for providing a voltage to the TFT-LCD, a plurality of analog switches with load resistances provided between one of the source voltage terminals and the output terminal and having a switching terminal, and a voltage selection circuit for transmitting an ON signal to a selected one or more of the respective switching terminals of the analog switches. When an individual analog switch is turned ON, the corresponding source voltage value is supplied to the output terminal of the driver circuit and when two or more analog switches are selectively turned on, a combination of the voltage levels of the respective source voltage is associated with those switches which are turned ON is produced as the driver circuit output voltage, thereby affording a greater number of gray levels as the driver circuit output voltage levels than the number of power source voltage levels.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: March 23, 1993
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Takahara, Tadahisa Yamaguchi, Masami Oda, Hisashi Yamaguchi, Tetsuo Aoki, Fumitaka Asami
  • Patent number: 4999708
    Abstract: A synchronous separation circuit used in a television video circuit for generating a horizontal synchronizing signal and a vertical synchronizing signal from a composite synchronizing signal has: a unit for generating a clock signal used as a reference signal and having a frequency higher than the frequency of the horizontal synchronizing signal; a unit for counting the clock signal from a front edge of a pulse contained in the composite synchronizing signal; a unit for obtaining a horizontal synchronous separation and for determining a counting term and outputting the horizontal synchronizing signal after the counting unit counts from the front edge of the horizontal synchronizing signal to a predetermined number; and a unit for obtaining a vertical synchronous separation and for latching the composite synchronizing signal based on an output of the counting unit, separate the vertical synchronizing signal from the composite synchronizing signal.
    Type: Grant
    Filed: January 23, 1989
    Date of Patent: March 12, 1991
    Assignee: Fujitsu Limited
    Inventors: Tetsuo Aoki, Fumitaka Asami
  • Patent number: 4701918
    Abstract: A logic analyzer applies test pattern signals from a pattern generator to a circuit under test and sequentially reads logic outputs into a memory. The output from the circuit under test when it reaches a predetermined logic state is input as an external control signal into the logic analyzer. A change command is generated from the pattern generator in relation to the generation of the test pattern signal. When the change command and the external control signal are obtained at the same time, and flow of the generation of the test pattern signals is changed to a predetermined flow.
    Type: Grant
    Filed: May 24, 1985
    Date of Patent: October 20, 1987
    Assignee: Takeda Riken Kogyo Kabushikikaisha
    Inventors: Takayuki Nakajima, Tetsuo Aoki, Katsumi Kobayashi, Noboru Akiyama
  • Patent number: 4696004
    Abstract: Logic output data of a plurality of channels simultaneously obtained from a circuit under test are sequentially input in a memory, and after inputting a predetermined amount of such data, they are compared with corresponding expected values. The input data are divided into blocks, each including a plurality of data. Whether a mismatch is present in the comparison results for each block is indicated by a respective block element, and such block elements are displayed in a predetermined arrangement. It is also possible to provide a conventional list display including the input timing corresponding to the comparison results in which a mismatch is present.
    Type: Grant
    Filed: May 24, 1985
    Date of Patent: September 22, 1987
    Assignee: Takeda Riken Kogyo Kabushikikaisha
    Inventors: Takayuki Nakajima, Tetsuo Aoki, Katsumi Kobayashi, Noboru Akiyama
  • Patent number: 4495621
    Abstract: A device for recognizing and measuring the lengths of glitches by sampling the input signal at fractions of a sampling clock, which clock has a period shorter than the period of pulses of the correct signal but longer than the glitch widths. The corrected input signal can be displayed, along with the glitch information.
    Type: Grant
    Filed: December 17, 1982
    Date of Patent: January 22, 1985
    Assignee: Takeda Riker Co. Ltd.
    Inventors: Koji Nakagomi, Tetsuo Aoki, Takayuki Nakajima
  • Patent number: 4486750
    Abstract: Control side equipment and at least one equipment under control are commonly interconnected via a data line and a strobe line. The equipment under control is provided with means for retaining the logic of a strobe pulse when it is received from a strobe line. When the control side equipment has set data on the data line and provided the strobe pulse on the strobe line, the logic hold means of the equipment under control holds the logic of the strobe pulse and the data set on the data line is fetched therefrom into the equipment. Thereafter, the logic hold is released to thereby inform the control side equipment that the equipment under control is ready for receiving the next data. The control side equipment monitors the strobe line and, upon detection of the information, sets new data on the data line and sends out a strobe pulse. Thereafter, similar operations are carried out, by which data are sequentially transferred from the control side equipment to the equipment under control.
    Type: Grant
    Filed: May 14, 1982
    Date of Patent: December 4, 1984
    Assignee: Takeda Riken Co. Ltd.
    Inventor: Tetsuo Aoki
  • Patent number: 4443626
    Abstract: Novel 2,3-dihydro-indene derivatives having remarkable anti-inflammatory effects and represented by the following formula ##STR1## wherein R.sup.1 and R.sup.2 are each a hydrogen atom, halogen atom, nitro group, lower alkyl group or lower alkyloxy group with the proviso that R.sup.1 and R.sup.2 do not take a hydrogen atom at the same time, and n is an integer of 2-4.
    Type: Grant
    Filed: June 7, 1982
    Date of Patent: April 17, 1984
    Assignee: Hisamitsu Pharmaceutical Co., Inc.
    Inventors: Kanji Noda, Akira Nakagawa, Kenji Yamagata, Yoichi Nakashima, Masayoshi Tsuji, Tetsuo Aoki, Hiroyuki Ide