Patents by Inventor Tetsuo Fukaya

Tetsuo Fukaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11709399
    Abstract: Provided is a liquid crystal display device including a first and second sub-pixels and including a first and second substrates. The first substrate includes a common electrode, an interlayer insulating film, and a first and second sub-pixel electrodes. The first and second sub-pixel electrodes each include linear electrode portions at an edge area and a linear electrode portion at a central area. The interlayer insulating film includes a region overlapping the linear electrode portions at the edge area and a region overlapping the linear electrode portion at the central area for each sub-pixel and the regions are different in at least one of a film thickness or a relative permittivity. An electric field strength between the common electrode and the linear electrode portions at the edge area is lower than an electric field strength between the common electrode and the linear electrode portion at the central area.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: July 25, 2023
    Assignee: Sharp Display Technology Corporation
    Inventors: Tetsuo Fukaya, Mitsuru Chida, Yoshito Hashimoto
  • Publication number: 20230194935
    Abstract: Provided is a liquid crystal display device including a first and second sub-pixels and including a first and second substrates. The first substrate includes a common electrode, an interlayer insulating film, and a first and second sub-pixel electrodes. The first and second sub-pixel electrodes each include linear electrode portions at an edge area and a linear electrode portion at a central area. The interlayer insulating film includes a region overlapping the linear electrode portions at the edge area and a region overlapping the linear electrode portion at the central area for each sub-pixel and the regions are different in at least one of a film thickness or a relative permittivity. An electric field strength between the common electrode and the linear electrode portions at the edge area is lower than an electric field strength between the common electrode and the linear electrode portion at the central area.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 22, 2023
    Inventors: Tetsuo FUKAYA, Mitsuru CHIDA, Yoshito HASHIMOTO
  • Publication number: 20190302539
    Abstract: A liquid crystal display device includes an active matrix substrate, a counter substrate, and a liquid crystal layer. The active matrix substrate includes an alignment film defining an initial alignment azimuth, and a first electrode and a second electrode to generate a fringing field. The counter substrate includes a transparent substrate and a third electrode provided on a side of the transparent substrate closer to the liquid crystal layer. The first electrode is a pixel electrode, and the second electrode is a common electrode. A DC voltage Vd is applied to the third electrode, the DC voltage Vd being different from a common voltage Vcom which is applied to the common electrode.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 3, 2019
    Inventors: KEI SHINADA, TOMOHISA MATSUSHITA, MASAHIRO SHIMIZU, TETSUO FUKAYA, TAICHI SASAKI
  • Patent number: 9891483
    Abstract: A liquid crystal display device includes a plurality of pixels arranged in a matrix pattern, each pixel including a first electrode and a second electrode for generating a transverse electric field, wherein: in a first group of pixels arranged in a line along either a row direction or a column direction, pairs of pixels are arranged repeatedly, each pair of pixels including two adjacent pixels that are different from each other in terms of an electrode structure of at least one of the first electrode and the second electrode; and voltages of the same polarity are applied to the two adjacent pixels included in the pair of pixels, and voltages of different polarities from each other are applied to two pixel pairs adjacent to each other in the first group of pixels.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 13, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yusuke Nishihara, Kazuhiko Tsuda, Tetsuo Fukaya, Hideki Fujimoto, Yoshito Hashimoto, Masahiro Shimizu
  • Patent number: 9864240
    Abstract: The present invention provides a fringe field switching (FFS) mode liquid crystal display device that makes it possible to improve transmittance when a voltage is applied.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: January 9, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Fukaya, Yoshito Hashimoto, Yusuke Nishihara
  • Publication number: 20160370664
    Abstract: The present invention provides a fringe field switching (FFS) mode liquid crystal display device that makes it possible to improve transmittance when a voltage is applied.
    Type: Application
    Filed: August 27, 2014
    Publication date: December 22, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tetsuo FUKAYA, Yoshito HASHIMOTO, Yusuke NISHIHARA
  • Publication number: 20160116770
    Abstract: In a liquid crystal display device (100), a first substrate (10) includes a first alignment film (25), a first electrode (24), a dielectric layer (23), and a second electrode (22), in this order away from a liquid crystal layer. One of the first and second electrode includes a plurality of linear portions (24s) which are parallel to each other. The second substrate (30) includes a second alignment film (35) and a light shielding layer (32) in this order away from the liquid crystal layer, the light shielding layer (32) having an opening (32a). The liquid crystal layer (42) contains a nematic liquid crystal material having negative dielectric anisotropy. Liquid crystal molecules contained in the liquid crystal material are aligned essentially horizontally by the first and second alignment films. The opening (32a) of the light shielding layer (32) has two sides which run parallel to the plurality of linear portions (24s) and define the width of the opening.
    Type: Application
    Filed: February 21, 2014
    Publication date: April 28, 2016
    Inventors: Tetsuo FUKAYA, Masahiro SHIMIZU, Taichi SASAKI, Masatoshi KONDO
  • Publication number: 20160085122
    Abstract: A liquid crystal display device includes a plurality of pixels arranged in a matrix pattern, each pixel including a first electrode and a second electrode for generating a transverse electric field, wherein: in a first group of pixels arranged in a line along either a row direction or a column direction, pairs of pixels are arranged repeatedly, each pair of pixels including two adjacent pixels that are different from each other in terms of an electrode structure of at least one of the first electrode and the second electrode; and voltages of the same polarity are applied to the two adjacent pixels included in the pair of pixels, and voltages of different polarities from each other are applied to two pixel pairs adjacent to each other in the first group of pixels.
    Type: Application
    Filed: February 27, 2014
    Publication date: March 24, 2016
    Inventors: Yusuke NISHIHARA, Kazuhiko TSUDA, Tetsuo FUKAYA, Hideki FUJIMOTO, Yoshito HASHIMOTO, Masahiro SHIMIZU
  • Patent number: 8779478
    Abstract: A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Moriguchi, Michiko Takei, Yohsuke Kanzaki, Tsuyoshi Inoue, Tetsuo Fukaya, Yudai Takanishi, Takatsugu Kusumi, Yoshiki Nakatani, Tetsuya Okamoto, Kenji Nakanishi
  • Publication number: 20130175521
    Abstract: A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.
    Type: Application
    Filed: May 23, 2011
    Publication date: July 11, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masao Moriguchi, Michiko Takei, Yohsuke Kanzaki, Tsuyoshi Inoue, Tetsuo Fukaya, Yudai Takanishi, Takatsugu Kusumi, Yoshiki Nakatani, Tetsuya Okamoto, Kenji Nakanishi
  • Publication number: 20130069930
    Abstract: A bistable circuit includes an output terminal that outputs a state signal, an output terminal that outputs an other-stage control signal, a first node of which a potential is controlled based on a set signal and a clear signal, a thin-film transistor that provides a potential of a second clock to the output terminal when a potential of the first node is at a high level, a thin-film transistor that provides a potential of a first clock to the output terminal when a potential of the first node is at a high level, and a thin-film transistor for changing a potential of the other-stage control signal to a low level based on a reset signal. The first clock is generated by a power source of a different system from the second clock, and has a smaller amplitude than that of the second clock.
    Type: Application
    Filed: October 29, 2010
    Publication date: March 21, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Fukaya, Masashi Yonemaru, Kenichi Ishii, Masahiko Nakamizo
  • Publication number: 20130037807
    Abstract: A semiconductor device (100) according to the present invention includes: a substrate (1); a gate electrode (11) which is arranged on the substrate; a gate insulating layer (12) which has been formed on the gate electrode; an oxide semiconductor layer (13) which has been formed on the gate insulating layer and which includes a channel region (13c) and source and drain regions (13s, 13d) that interpose the channel region between them; a source electrode (14) which is electrically connected to the source region; a drain electrode (15) which is electrically connected to the drain region; and a metallic compound layer (16) which is arranged between the source and drain electrodes so as to be located on, and contact with, the oxide semiconductor layer. The metallic compound layer is an insulating layer or semiconductor layer which is made of a compound of the same metallic element as at least one of metallic elements that are included in the source and drain electrodes.
    Type: Application
    Filed: March 10, 2011
    Publication date: February 14, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Tetsuo Fukaya
  • Publication number: 20120200482
    Abstract: A liquid crystal display panel 100 has: a first substrate 11, having an active region AA having pixel electrodes and TFTs, and a gate driver region GDR provided on the outside of the active region AA; and a second substrate 21, disposed opposing the first substrate 11 with a liquid crystal layer 30 interposed therebetween, and having an opposite electrode 23. The opposite electrode 23 opposes the gate driver region GDR with the liquid crystal layer 30 interposed therebetween, and an insulating resin layer 26 is formed on the region of the opposite electrode 23 so that the insulating resin layer 26 opposes the gate driver region GDR. Thus, short-circuit failure between the driver region of the TFT substrate and the opposite electrode is eliminated.
    Type: Application
    Filed: September 30, 2010
    Publication date: August 9, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Fukaya, Yuhichi Saitoh, Hiroyuki Moriwaki, Yasuhiro Nakatake, Yukio kurozumi, Masato Kakuta, Masahiko Nakamizo, Takahiro Umezawa