Abstract: According to an apparatus for automatically generating a logic circuit, when a request specification represented by a state transition diagram is input to the apparatus, the apparatus divides the specification into an information control part and an information processing part, divides the information control part into a transition state generator and a control signal generator, and specifies the transition state generator, the control signal generator, and the information processing part, as combinations of circuits, which are realized by combinations of logic elements and wirings, and wirings connecting the circuits. Therefore, the apparatus can easily cope with a change of use of the logic circuit, a change of a library of a final product, and the like.

Abstract: A simulation program conversion method and system is provided. The original simulation program is written by a function description language, such as Verilog-HDL, using a text editor, and, then, the original simulation program is converted into an executable program using a programming language, such as the C language, so that the simulation program may be compiled before execution. The speed of execution of the simulation program is significantly improved.