Patents by Inventor Tetsuo KANAMORI

Tetsuo KANAMORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150173185
    Abstract: A circuit board structure and a manufacturing method for a circuit board that ensures an electrical connection between a metal foil and a projection without using a conductive adhesive and is less likely to cause a decrease in the reliability of the connection due to the interlayer separation or the like is provided. A circuit board includes an insulating layer, a lower main surface wiring pattern and an upper main surface wiring pattern disposed on either side of the insulating layer, and an interlayer connection conductor passing through the insulating layer in a thickness direction and electrically connecting to the lower main surface wiring pattern and the upper main surface wiring pattern. The interlayer connection conductor is formed integrally with the lower main surface wiring pattern, and is bonded to the upper main surface wiring pattern via an intermetallic compound.
    Type: Application
    Filed: March 2, 2015
    Publication date: June 18, 2015
    Inventors: Satoshi Ito, Yoichi Moriya, Tetsuo Kanamori, Yukihiro Yagi, Yuki Yamamoto
  • Patent number: 9044728
    Abstract: An ozone generating element includes a laminated body including stacked dielectric layers. A discharge electrode is provided on a first of the dielectric layers. An induction electrode is provided on a second of the dielectric layers that is opposed to the discharge electrode with the first dielectric layer interposed therebetween. A protective layer is arranged on the first dielectric layer so as to cover the discharge electrode, and includes a glass ceramic.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: June 2, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tetsuo Kanamori, Yukihiro Yagi, Takahiro Takada, Toshiyuki Miyamoto
  • Patent number: 9030005
    Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: May 12, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi Moriya, Tetsuo Kanamori, Yukihiro Yagi, Yasutaka Sugimoto, Takahiro Takada
  • Patent number: 8980028
    Abstract: In a metal base substrate with a low-temperature sintering ceramic layer located on a copper substrate, bonding reliability is increased between the copper substrate and the low-temperature sintering ceramic layer. A raw laminated body is prepared by stacking, on a surface of a copper substrate, a low-temperature sintering ceramic green layer including a low-temperature sintering ceramic material containing about 10 mol % to about 40 mol % of barium in terms of BaO and about 40 mol % to about 80 mol % of silicon in terms of SiO2, and this raw laminated body is subjected to firing at a temperature at which the low-temperature sintering ceramic green layer is sintered. In the thus obtained metal base substrate, a glass layer composed of Cu—Ba—Si based glass with a thickness of about 1 ?m to about 5 ?m is formed between the metal substrate and the low-temperature sintering ceramic layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 17, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi Moriya, Tsuyoshi Katsube, Yuki Takemori, Tetsuo Kanamori, Yasutaka Sugimoto, Takahiro Takada
  • Patent number: 8975743
    Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: March 10, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi Moriya, Tetsuo Kanamori, Yukihiro Yagi, Yasutaka Sugimoto, Takahiro Takada
  • Publication number: 20140118977
    Abstract: A wiring board includes an insulating layer, and an upper wiring pattern and a lower wiring pattern arranged with the insulating layer interposed therebetween. A truncated cone-shaped projection is integral with the lower wiring pattern so as to project at the upper wiring pattern side, and a truncated cone-shaped projection is integral with the upper wiring pattern so as to project at the lower wiring pattern side. Bonding end portions of the projections are bonded to each other to form an inter-layer connection conductor. The inter-layer connection conductor conducts the upper wiring pattern and the lower wiring pattern.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi ITO, Yoichi MORIYA, Tetsuo KANAMORI, Yukihiro YAGI, Yuki YAMAMOTO
  • Publication number: 20140022750
    Abstract: A circuit board includes an insulating layer with a surface on which a semiconductor element is to be mounted and wiring portions that are located on the insulating layer. The wiring portions includes upper wiring portions, lower wiring portions, and interlayer wiring portions. The upper wiring portions, the lower wiring portions, and the interlayer wiring portions are integrally defined by a single copper sheet. With this configuration, a circuit board capable of withstanding a large current and a method of manufacturing the circuit board are provided.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 23, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi MORIYA, Satoshi ITO, Tetsuo KANAMORI, Yukihiro YAGI, Yuki YAMAMOTO
  • Publication number: 20130264723
    Abstract: In a metal base substrate with a low-temperature sintering ceramic layer located on a copper substrate, bonding reliability is increased between the copper substrate and the low-temperature sintering ceramic layer. A raw laminated body is prepared by stacking, on a surface of a copper substrate, a low-temperature sintering ceramic green layer including a low-temperature sintering ceramic material containing about 10 mol % to about 40 mol % of barium in terms of BaO and about 40 mol % to about 80 mol % of silicon in terms of SiO2, and this raw laminated body is subjected to firing at a temperature at which the low-temperature sintering ceramic green layer is sintered. In the thus obtained metal base substrate, a glass layer composed of Cu—Ba—Si based glass with a thickness of about 1 ?m to about 5 ?m is formed between the metal substrate and the low-temperature sintering ceramic layer.
    Type: Application
    Filed: September 28, 2012
    Publication date: October 10, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoichi MORIYA, Tsuyoshi KATSUBE, Yuki TAKEMORI, Tetsuo KANAMORI, Yasutaka SUGIMOTO, Takahiro TAKADA