Abstract: A control data transmission system controls an electronic switching system with few signal lines. Control data are split into a plurality of fixed-length bit blocks. The control data sequence number specification signals identify the fixed-length bit blocks. The control data sequence number specification signals are paired with corresponding control data signals carrying the contents of one of the fixed-length bit blocks and a control data validity specification signal for validating transmission of the control data. The control data sequence number specification signals are decoded and the contents of respective bit blocks carried by the control data signals are stored according to the decoding result and the control data validity specification signal. When the contents of the fixed-length bit blocks carried by the control data signals for one unit of control data are stored, the control data are analyzed.

Abstract: A group of control registers for controlling a plurality of input output devices respectively are formed in random access memory which is connected to a microprocessor bus of an input output control device. A history of a program mode access from a central processing apparatus to the RAM is recorded in a first-in first-out memory (FIFO). The microprocessor of the input output control device reads an access information of the FIFO, accesses the group of the control registers on the RAM, and controls the input output device according to the read control information. Thus, control of a plurality of input output devices is carried out by one input output device.