Abstract: A heterojunction field effect transistor comprises a semi-insulating GaAs substrate, an n-InGaAs channel layer on the substrate, and a barrier layer on the n-InGaAs channel layer. The barrier layer is composed of a substantially fully depleted p-AlGaAs layer between two i-AlGaAs layers. A gate electrode is in Schottky contact with the barrier layer. Since the p-AlGaAs layer raises the barrier height in the barrier layer higher than the Schottky barrier, forward gate current is suppressed. In addition, the breakdown voltage is improved since a longer depletion region extends toward the drain side when a reverse bias is applied between the gate and the drain.

Abstract: The present method includes steps of: discharging a droplet of fluid containing fine particles with electric characteristics from an inkjet nozzle onto the microwave integrated circuit formed on a substrate; forming a coat of the fine particles having electric characteristics on the substrate; measuring electric characteristics of the microwave integrated circuit using a probe of a circuit evaluation apparatus before and after forming the coat; and adjusting the electric characteristics of the microwave integrated circuit, so that forming the coat at a desired location on the upper surface of the circuit substrate by scanning an aim of the inkjet nozzle against the circuit substrate enables the microwave integrated circuit to meet the specification.

Abstract: A high-frequency semiconductor device includes: a first cell which includes of gate electrodes on a surface of an epitaxial layer of a substrate, drain electrodes and source electrodes alternately located relative to the gate electrodes, a source electrode connection wiring striding over the gate electrodes and the drain electrodes and connecting the source electrodes, and a drain electrode connection wiring striding over the gate electrodes and the source electrodes and connecting the drain electrodes; a second cell which has the same configurations as the first cell, is located in an extended direction of each of the gate electrodes of the first cell, and has the drain electrode connection wiring proximate to the drain electrode connection wiring of the first cell; and a gate electrode bar located between the drain electrode connection wirings of the first and second cells, and to which the gate electrodes of the first and second cells are connected.

Abstract: A field effect transistor includes a semiconductor substrate having an active region, a source region, and a drain region at an upper portion of the substrate. The active region is located between the source and drain regions. A gate electrode is located on the active region. A source electrode is located on the source region and forms an ohmic contact with the source region. A drain electrode has a base part on and in ohmic contact with the drain region and an extended part having edge closer to the gate electrode than to a boundary between the active region and the drain region. An insulating film is located between the boundary and the extended part and has a thickness that increases along a direction from the drain electrode toward the gate electrode in a step-by-step or continuous manner.

Abstract: The present method includes steps of: discharging a droplet of fluid containing fine particles with electric characteristics from an inkjet nozzle onto the microwave integrated circuit formed on a substrate; forming a coat of the fine particles having electric characteristics on the substrate; measuring electric characteristics of the microwave integrated circuit using a probe of a circuit evaluation apparatus before and after forming the coat; and adjusting the electric characteristics of the microwave integrated circuit, so that forming the coat at a desired location on the upper surface of the circuit substrate by scanning an aim of the inkjet nozzle against the circuit substrate enables the microwave integrated circuit to meet the specification.

Abstract: A semiconductor device includes a semiconductor substrate having one principal plane on which a plurality of electrodes are formed. A film which is made of polymer with a low dielectric constant is formed over the gate and drain electrodes so as to insulate the gate and drain electrodes from the source electrode. A chip surface electrode is formed over the low-dielectric-constant polymer film and the source electrode, and connected to a ground potential. The source electrode is provided with a ground potential through the chip surface electrode.

Abstract: An inexpensive and small-sized semiconductor device with high power output performance includes a semiconductor substrate; an active region on the semiconductor substrate; first and second channel regions on the active region so that width directions of the first and second channel regions are substantially perpendicular to each other, bent gate electrodes on the first and second channel regions; and source electrodes and drain electrodes on opposite sides of the bent gate electrodes.

Abstract: A semiconductor device having a plated heat sink (PHS) layer on the back surface, preventing a short circuit between a bonding wire, and a first metal layer. A method of making a semiconductor device including forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, and forming the first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

Abstract: A semiconductor device having a PHS layer on the back surface thereof, preventing from a short circuit between a bonding wire and a first metal layer. Forming catalyst layer on a bottom of a first separation groove formed in the front surface of a semiconductor substrate, forming the first metal layer selectively in the first separation groove by an electroless plating technique using the catalyst layer as a catalyst.

Abstract: A semiconductor device has a plated heat sink layer on the back surface, preventing a short-circuit between a bonding wire and a first metal layer. A method of making a semiconductor device includes forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, forming a first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

Abstract: A method of producing a semiconductor device includes a semiconductor substrate and a gate embedding layer. A pair of side walls made of insulating layers having a width are formed on the inner surface of a first opening and the gate embedding layer is formed by using the pair of side walls and a first insulating layer as masks so that the embedded portion and the first extending portion are self-aligned and, consequently, the first extending portion is symmetrical with respect to the embedded portion. Accordingly, the first extending portion of the gate electrode is offset toward the drain electrode or source electrode.

Abstract: A semiconductor device includes a semiconductor substrate having an active region and first and second external regions located on opposite sides of the active region. The active region has a multi-finger pattern including gate electrodes, source electrodes, and drain electrodes. Each of the gate electrodes is interposed between one of the source electrodes and one of the drain electrodes. Mutually spaced gate pads are disposed on the first external region and each of the gate pads is connected to the gate electrodes. Mutually spaced drain pads are disposed on the second external region, and each of the drain pads is connected to the drain electrodes. Mutually spaced and grounded source pads are disposed on the first and second external regions, and each of the source pads is electrically connected to the source electrodes.