Patents by Inventor Tetsuo Kurayama

Tetsuo Kurayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-speed serial transfer device test data storage medium and device
    Patent number: 8086918
    Abstract: A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer device has. A basic pattern setting unit sets a basic pattern while considering a byte order method and an RD value of code conversion in the high-speed serial transfer device. A basic pattern resetting unit resets the basic pattern in accordance with a channel usage method of a bit transfer order in the high-speed serial transfer device. A basic pattern rearranging unit performs rearrangement such that the basic pattern is transferred to each of the channels in accordance with the number of used channels and a channel usage method such as bit transfer order in the high-speed serial transfer device.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: December 27, 2011
    Assignee: Fujitsu Limited
    Inventor: Tetsuo Kurayama
  • High-speed serial transfer device test method, program, and device
    Publication number: 20110055651
    Abstract: A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer device has. A basic pattern setting unit sets a basic pattern while considering a byte order method and an RD value of code conversion in the high-speed serial transfer device. A basic pattern resetting unit resets the basic pattern in accordance with a channel usage method of a bit transfer order in the high-speed serial transfer device. A basic pattern rearranging unit performs rearrangement such that the basic pattern is transferred to each of the channels in accordance with the number of used channels and a channel usage method such as bit transfer order in the high-speed serial transfer device.
    Type: Application
    Filed: November 5, 2010
    Publication date: March 3, 2011
    Applicant: Fujitsu Limited
    Inventor: Tetsuo Kurayama
  • High-speed serial transfer device test method, program, and device
    Patent number: 7853849
    Abstract: A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer device has. A basic pattern setting unit sets a basic pattern while considering a byte order method and an RD value of code conversion in the high-speed serial transfer device. A basic pattern resetting unit resets the basic pattern in accordance with a channel usage method of a bit transfer order in the high-speed serial transfer device. A basic pattern rearranging unit performs rearrangement such that the basic pattern is transferred to each of the channels in accordance with the number of used channels and a channel usage method such as bit transfer order in the high-speed serial transfer device.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: December 14, 2010
    Assignee: Fujitsu Limited
    Inventor: Tetsuo Kurayama
  • High-speed serial transfer device test method, program, and device
    Publication number: 20070162807
    Abstract: A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer device has. A basic pattern setting unit sets a basic pattern while considering a byte order method and an RD value of code conversion in the high-speed serial transfer device. A basic pattern resetting unit resets the basic pattern in accordance with a channel usage method of a bit transfer order in the high-speed serial transfer device. A basic pattern rearranging unit performs rearrangement such that the basic pattern is transferred to each of the channels in accordance with the number of used channels and a channel usage method such as bit transfer order in the high-speed serial transfer device.
    Type: Application
    Filed: April 6, 2006
    Publication date: July 12, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Tetsuo Kurayama