Patents by Inventor Tetsuo Morita
Tetsuo Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110181586Abstract: In one embodiment, a driving circuit includes first, second, third and fourth transistors each having first and second electrodes, and a control gate electrode. First and second input signals for producing alternating current voltage are inputted to the respective first electrodes of the first and second transistors. The first electrode of the third transistor and the second electrode of the fourth transistor are commonly connected with an output terminal. The second electrode of the third transistor and the first electrode of the fourth transistor are respectively connected with first and second voltage sources. The control gate electrodes of the third and fourth transistors are respectively connected with the second electrodes of the first and second transistors. The driving circuit further includes first and second potential holding devices to control the switching operation of the third and fourth transistors to output the first and second voltages.Type: ApplicationFiled: January 24, 2011Publication date: July 28, 2011Applicant: Toshiba Mobile Display Co., Ltd.Inventors: Tetsuo MORITA, Hiroyuki Kimura
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Publication number: 20100033669Abstract: A display device has a pair of substrates arranged opposite to each other, a light modulation layer interposed between the pair of substrates, and spacers arranged between the pair of substrates to maintain a gap therebetween. A display area is formed by the pair of substrates, the modulation layer and the spacers, and includes a plurality of pixels arranged in rows and columns of a matrix. The spacers are arranged between adjacent pixels in the column direction so that an area density of the spacers continuously changes from an edge portion to a predetermined portion in the display area extending in the row direction.Type: ApplicationFiled: August 5, 2009Publication date: February 11, 2010Applicant: Toshiba Mobile Display Co., Ltd.Inventors: Kazumi Iizawa, Tetsuya Kawamura, Tetsuo Morita
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Patent number: 7463234Abstract: A liquid crystal display in which a structure of a signal line drive circuit can be simplified is provided. The liquid crystal display according to the present invention includes sampling latch circuits, load latch circuits and D/A converters which are ? of an aggregate number of signal lines, and drives every six signal lines for six times. As a result, a mounting area of a signal line drive circuit can be reduced. Further, after driving odd-numbered signal lines in a first half of a one-horizontal-line period, even-numbered signal lines are driven in a last half of the same. Therefore, V-inversion driving can be easily realized by only switching the polarity of an analog gradation voltage in the first half and the last half of the one-horizontal-line period. That is, since the number of times of switching the voltage polarity can be reduced, voltage control is facilitated, thereby hardly being influenced by noises.Type: GrantFiled: March 11, 2005Date of Patent: December 9, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Tetsuo Morita
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Patent number: 7382347Abstract: When a voltage level of a pulse-cut first clock signal inputted to a first clock terminal is reversed in the state where a first transistor is turned on and a second transistor is turned off, an anti-reversal circuit including a seventh transistor and an eighth transistor supplies a high voltage VDD to a node n2. In this way, a floating state of the node n2 is avoided, and the voltage level of the node n2 is prevented from being reversed. Accordingly, the second transistor will not be turned on in the interval, whereby electric potential of an output signal is stably maintained.Type: GrantFiled: December 6, 2004Date of Patent: June 3, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Sasaki, Tetsuo Morita
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Publication number: 20080036722Abstract: To effectively perform an MF drive by using a simple configuration, a scanning line drive circuit for a display device includes scanning-line driving shift registers serially disposed at a plurality of stages; first switch elements each connected between an output terminal of a first one of the scanning-line driving shift registers and an input terminal of a second scanning-line driving shift register disposed at the following stage; second switch elements each connected between the output terminal of a first one of the scanning-line driving shift registers and the input terminal of a third scanning-line driving shift register disposed at the N+1-th stage following the first scanning-line driving shift register; and a control circuit which controls the first switch elements and the second switch elements.Type: ApplicationFiled: July 23, 2007Publication date: February 14, 2008Applicant: Toshiba Matsushita Display Technology Co., Ltd.Inventors: Seiichi URAMOTO, Tetsuo MORITA
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Patent number: 7221197Abstract: In a driver circuit of a display device, an electric potential difference between high-level power supply voltage VDD and low-level power supply voltage VSS2 in shift registers and buffers is set smaller than an electric potential difference between high-level voltage VDD and low-level voltage VSS of enable signals OE in order to prevent increase in voltage stress on each transistor and concurrently to make larger an electric potential difference between high-level voltage and low-level voltage of output signals.Type: GrantFiled: July 12, 2005Date of Patent: May 22, 2007Assignee: Toshiba Matsushita Display Technology Co., Ltd.Inventor: Tetsuo Morita
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Patent number: 7098882Abstract: In forward direction pulse shift, by turning off a sixteenth transistor, a through-current is prevented from flowing between the fifth transistor and the seventh transistor. In backward direction pulse shift, by turning off the fifteenth transistor, a through-current is prevented from flowing between the fifth and sixth transistors. Thus, a potential variation in an output signal of a shift register between the forward direction pulse shift and the backward direction pulse shift is prevented.Type: GrantFiled: November 25, 2003Date of Patent: August 29, 2006Assignee: Toshiba Matsushita Display Technology Co., Ltd.Inventors: Masakatsu Kitani, Tetsuo Morita
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Patent number: 7088328Abstract: A signal line driving circuit makes the polarities of video signals different from each other, the video signal being supplied to pixel electrodes adjacent to an arbitrary pixel electrode on both sides thereof in a horizontal scanning direction. The signal line driving circuit also makes the polarities of video signals different from each other, the video signal being supplied to pixel electrodes adjacent to the arbitrary pixel electrode on both sides thereof in a vertical scanning direction. A signal line driving IC outputs the video signal to each signal line group obtained by dividing a plurality of signal lines to a plurality of signal line groups composed of a predetermined number of the signal lines. A signal line switching circuit switches all of the signal lines in each signal line group sequentially during one horizontal scanning period.Type: GrantFiled: November 13, 2002Date of Patent: August 8, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhiko Inada, Yasuyuki Hanazawa, Tetsuo Morita, Kohei Nagayama, Hideyuki Takahashi
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Publication number: 20060038766Abstract: In a driver circuit of a display device, an electric potential difference between high-level power supply voltage VDD and low-level power supply voltage VSS2 in shift resistors and buffers is set smaller than an electric potential difference between high-level voltage VDD and low-level voltage VSS of enable signals OE in order to prevent increase in voltage stress on each transistor and concurrently to make larger an electric potential difference between high-level voltage and low-level voltage of output signals.Type: ApplicationFiled: July 12, 2005Publication date: February 23, 2006Applicant: Toshiba Matsushita Display Technology Co., Ltd.Inventor: Tetsuo Morita
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Patent number: 6989810Abstract: A liquid crystal display in which a structure of a signal line drive circuit can be simplified is provided. The liquid crystal display according to the present invention includes sampling latch circuits, load latch circuits and D/A converters which are ? of an aggregate number of signal lines, and drives every six signal lines for six times. As a result, a mounting area of a signal line drive circuit can be reduced. Further, after driving odd-numbered signal lines in a first half of a one-horizontal-line period, even-numbered signal lines are driven in a last half of the same. Therefore, V-inversion driving can be easily realized by only switching the polarity of an analog gradation voltage in the first half and the last half of the one-horizontal-line period. That is, since the number of times of switching the voltage polarity can be reduced, voltage control is facilitated, thereby hardly being influenced by noises.Type: GrantFiled: May 29, 2001Date of Patent: January 24, 2006Assignee: Kabushiki Kaisha ToshibaInventor: Tetsuo Morita
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Publication number: 20050185752Abstract: When a voltage level of a pulse-cut first clock signal inputted to a first clock terminal is reversed in the state where a first transistor is turned on and a second transistor is turned off, an anti-reversal circuit including a seventh transistor and an eighth transistor supplies a high voltage VDD to a node n2. In this way, a floating state of the node n2 is avoided, and the voltage level of the node n2 is prevented from being reversed. Accordingly, the second transistor will not be turned on in the interval, whereby electric potential of an output signal is stably maintained.Type: ApplicationFiled: December 6, 2004Publication date: August 25, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasushi Sasaki, Tetsuo Morita
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Patent number: 6928135Abstract: When a voltage level of a pulse-cut first clock signal inputted to a first clock terminal is reversed in the state where a first transistor is turned on and a second transistor is turned off, an anti-reversal circuit including a seventh transistor and an eighth transistor supplies a high voltage VDD to a node n2. In this way, a floating state of the node n2 is avoided, and the voltage level of the node n2 is prevented from being reversed. Accordingly, the second transistor will not be turned on in the interval, whereby electric potential of an output signal is stably maintained.Type: GrantFiled: April 9, 2002Date of Patent: August 9, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Sasaki, Tetsuo Morita
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Publication number: 20050162371Abstract: A liquid crystal display in which a structure of a signal line drive circuit can be simplified is provided. The liquid crystal display according to the present invention includes sampling latch circuits, load latch circuits and D/A converters which are ? of an aggregate number of signal lines, and drives every six signal lines for six times. As a result, a mounting area of a signal line drive circuit can be reduced. Further, after driving odd-numbered signal lines in a first half of a one-horizontal-line period, even-numbered signal lines are driven in a last half of the same. Therefore, V-inversion driving can be easily realized by only switching the polarity of an analog gradation voltage in the first half and the last half of the one-horizontal-line period. That is, since the number of times of switching the voltage polarity can be reduced, voltage control is facilitated, thereby hardly being influenced by noises.Type: ApplicationFiled: March 11, 2005Publication date: July 28, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tetsuo Morita
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Patent number: 6839119Abstract: A display device includes a substrate (100), pixel electrodes (PIX) formed on the substrate (100), scanning lines (G) to transmit scanning signals, signal lines (S) divided into four groups (LL, LR, RL and RR) to transmit data signals, signal line driving circuits (112) to drive the groups (LL, LR, RL and RR) of the signal lines (S), respectively, analog switch control signal lines (107 and 108) connected between the signal line driving circuits (112) and the groups (LL, LR, RL and RR) of the signal lines (S), and transistors (ASW) connected between the analog switch control signal lines (107 and 108) and the groups (LL, LR, RL and RR) of the signal lines (S) to provide the data signals to the pixel electrodes (PIX) in response to the scanning signals.Type: GrantFiled: May 19, 2003Date of Patent: January 4, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Sasaki, Katsuhiko Inada, Tetsuo Morita, Koichi Shiba
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Publication number: 20040104882Abstract: In forward direction pulse shift, by turning off a sixteenth transistor, a through-current is prevented from flowing between the fifth transistor and the seventh transistor. In backward direction pulse shift, by turning off the fifteenth transistor, a through-current is prevented from flowing between the fifth and sixth transistors. Thus, a potential variation in an output signal of a shift register between the forward direction pulse shift and the backward direction pulse shift is prevented.Type: ApplicationFiled: November 25, 2003Publication date: June 3, 2004Applicant: Toshiba Matsushita Display Technology Co., Ltd.Inventors: Masakatsu Kitani, Tetsuo Morita
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Publication number: 20040078392Abstract: The transmission data generation method comprises a step of setting the size of the fixed block based on the overhead (S3), a step of calculating the playout time of the fixed block based on the size of the fixed block (S4), a step of calculating the playout time of the segment for each segment of the contents based on the playout time of the fixed block (S14), a step of calculating the transmission time of the segment for each segment of the contents based on the calculated playout time of the segment (S18, S19), a step of dividing the contents into segments according to the transmission time of the segment, a step of dividing the segment into blocks, and a step of converting the contents into meta contents by adding overhead for each block, wherein the overhead is set for each segment based on the overhead in the fixed block.Type: ApplicationFiled: July 10, 2003Publication date: April 22, 2004Inventor: Tetsuo Morita
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Patent number: 6719224Abstract: A fuel supply system has a pump, a common rail, and injectors. Pressurized fuel is stored in the common rail. The common rail distributes the fuel to the injectors. A liquid fuel and a liquefied gas fuel such as dimethyl ether and a liquefied petroleum gas may be used as a fuel. In each injector, a valve element is actuated directly by an electromagnetic actuator. The injector has a low pressure chamber for decreasing a biasing force which acts on the valve element in a valve closing direction. The valve element can be divided for replacement. The injector has means for suppressing the bounce of the valve element. A hydraulic unit which utilizes the fuel suppresses the bounce of the valve element. The fuel supply system is connected to a refrigerating cycle. The fuel leaking from the fuel supply system is cooled and again liquefied by the refrigerating cycle.Type: GrantFiled: December 18, 2002Date of Patent: April 13, 2004Assignees: Nippon Soken, Inc., Denso CorporationInventors: Shigeiku Enomoto, Moriyasu Goto, Tetsuo Morita, Masaaki Kato, Hisaharu Takeuchi
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Publication number: 20030234902Abstract: A display device includes a substrate (100), pixel electrodes (PIX) formed on the substrate (100), scanning lines (G) to transmit scanning signals, signal lines (S) divided into four groups (LL, LR, RL and RR) to transmit data signals, signal line driving circuits (112) to drive the groups (LL, LR, RL and RR) of the signal lines (S), respectively, analog switch control signal lines (107 and 108) connected between the signal line driving circuits (112) and the groups (LL, LR, RL and RR) of the signal lines (S), and transistors (ASW) connected between the analog switch control signal lines (107 and 108) and the groups (LL, LR, RL and RR) of the signal lines (S) to provide the data signals to the pixel electrodes (PIX) in response to the scanning signals.Type: ApplicationFiled: May 19, 2003Publication date: December 25, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasushi Sasaki, Katsuhiko Inada, Tetsuo Morita, Koichi Shiba
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Publication number: 20030110780Abstract: A fuel supply system has a pump, a common rail, and injectors. Pressurized fuel is stored in the common rail. The common rail distributes the fuel to the injectors. A liquid fuel and a liquefied gas fuel such as dimethyl ether and a liquefied petroleum gas may be used as a fuel. In each injector, a valve element is actuated directly by an electromagnetic actuator. The injector has a low pressure chamber for decreasing a biasing force which acts on the valve element in a valve closing direction. The valve element can be divided for replacement. The injector has means for suppressing the bounce of the valve element. A hydraulic unit which utilizes the fuel suppresses the bounce of the valve element. The fuel supply system is connected to a refrigerating cycle. The fuel leaking from the fuel supply system is cooled and again liquefied by the refrigerating cycle.Type: ApplicationFiled: December 18, 2002Publication date: June 19, 2003Inventors: Shigeiku Enomoto, Moriyasu Goto, Tetsuo Morita, Masaaki Kato, Hisaharu Takeuchi
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Patent number: RE40483Abstract: A headgear holder for use with a sewing machine, the holder holding a headgear including a covering member with an opening and a sweatband fixed to an annular portion of the covering member located on the side of the opening, the sweatband being foldable into an inner space of the covering member and unfoldable outside from the inner space through the opening, the sewing machine forming an embroidery on each of a frontal portion, and at least one of a right and a left temporal portion, of the annular portion, the holder including a main frame member on which the headgear is set such that the sweatband unfolded outside and the annular portion of the covering member externally fit on the main frame member, a pressing member which externally presses the headgear set on the main frame member, and two fastening devices one of which is provided between the main frame member and a corresponding one of opposite ends of the pressing member and the other of which is provided between the main frame member and the otherType: GrantFiled: October 12, 1999Date of Patent: September 9, 2008Assignee: Brother Kogyo Kabushiki KaishaInventors: Tetsuo Morita, Satoshi Kato