Patents by Inventor Tetsuo Motomiya

Tetsuo Motomiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972991
    Abstract: A semiconductor device includes: an inner frame that surrounds an outer circumference of a semiconductor chip; and an outer frame that surrounds an outer circumference of the inner frame; wherein the outer frame is configured with an exterior wall that surrounds the outer circumference of the inner frame, and a fibrous reinforcing member that is wound on an outer circumference of the exterior wall. This prevents the broken pieces of a component that constitutes the semiconductor device from being scattered outside the semiconductor device, thereby not only to achieve improvement in the reliability of the entire system, but also to achieve downsizing of the semiconductor device.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: April 30, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroki Shiota, Tetsuo Motomiya, Kunihiko Tajiri, Jun Okada, Hiroumi Yamada, Kazutake Kadowaki
  • Patent number: 11569141
    Abstract: A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: January 31, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Oya, Yukimasa Hayashida, Tetsuo Motomiya
  • Publication number: 20220084899
    Abstract: A semiconductor device includes: an inner frame that surrounds an outer circumference of a semiconductor chip; and an outer frame that surrounds an outer circumference of the inner frame; wherein the outer frame is configured with an exterior wall that surrounds the outer circumference of the inner frame, and a fibrous reinforcing member that is wound on an outer circumference of the exterior wall. This prevents the broken pieces of a component that constitutes the semiconductor device from being scattered outside the semiconductor device, thereby not only to achieve improvement in the reliability of the entire system, but also to achieve downsizing of the semiconductor device.
    Type: Application
    Filed: February 1, 2019
    Publication date: March 17, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroki SHIOTA, Tetsuo MOTOMIYA, Kunihiko TAJIRI, Jun OKADA, Hiroumi YAMADA, Kazutake KADOWAKI
  • Publication number: 20220005783
    Abstract: The present invention has an object to enhance manufacturability of a pressure-contact-type semiconductor device. A pressure-contact-type semiconductor device according to the present invention includes: a semiconductor chip, the semiconductor chip including a guard ring and a gate signal input/output part in the first main surface; a first external electrode being formed on a side of the first main surface of the semiconductor chip; a conductive pattern being formed on the first external electrode; a contact pin connecting the gate signal input/output part and the conductive pattern; a plate-like electrode being provided on the second main surface of the semiconductor chip; a disc spring being provided on the plate-like electrode; and a second external electrode being provided on the disc spring, the second external electrode and the first external electrode interposing the semiconductor chip.
    Type: Application
    Filed: January 23, 2019
    Publication date: January 6, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Jun OKADA, Tetsuo MOTOMIYA, Kazunori TAGUCHI
  • Publication number: 20210217675
    Abstract: A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.
    Type: Application
    Filed: August 8, 2018
    Publication date: July 15, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Daisuke OYA, Yukimasa HAYASHIDA, Tetsuo MOTOMIYA
  • Patent number: 10536090
    Abstract: There has been a problem that a chip or a power module is broken by a repulsive electromagnetic force between positive and negative bus bars and an arc is generated, so that the failure is escalated. Therefore, positive and negative bus bars connecting two devices are configured so as to form a one-turn-loop current path, thereby suppressing a repulsive electromagnetic force occurring between the bus bars and decreasing a possibility of occurrence of an arc at the power module.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: January 14, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tetsuya Matsuda, Shigeto Fujita, Tetsuo Motomiya
  • Publication number: 20190319544
    Abstract: There has been a problem that a chip or a power module is broken by a repulsive electromagnetic force between positive and negative bus bars and an arc is generated, so that the failure is escalated. Therefore, positive and negative bus bars connecting two devices are configured so as to form a one-turn-loop current path, thereby suppressing a repulsive electromagnetic force occurring between the bus bars and decreasing a possibility of occurrence of an arc at the power module.
    Type: Application
    Filed: August 1, 2017
    Publication date: October 17, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tetsuya MATSUDA, Shigeto FUJITA, Tetsuo MOTOMIYA
  • Patent number: 10418347
    Abstract: It is an object to provide a pressure-contact power semiconductor device and a power semiconductor core module which are capable of properly reducing their sizes. Each power semiconductor core module includes the following: a plurality of power semiconductor chips including a plurality of self-turn-off semiconductor elements and a plurality of diodes adjacent to each other in plan view; and a plurality of first springs disposed between an upper metal plate and a conductive cover plate. The plurality of self-turn-off semiconductor elements of each power semiconductor core module are arranged along any one of an L-shaped line, a cross-shaped line, and a T-shaped line in plan view.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: September 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshiko Tamada, Yoshihiro Yamaguchi, Seiji Oka, Tetsuo Motomiya
  • Patent number: 10186607
    Abstract: An object is to provide a technique that enables suppression of oscillation of a gate signal waveform. A power semiconductor device includes a power semiconductor chip, a plurality of collector main terminals and a plurality of emitter main terminals electrically connected to the power semiconductor chip, and a signal line. The plurality of collector main terminals and the plurality of emitter main terminals have protrusion portions which protrude from a disposition surface of the power semiconductor chip, respectively, and the signal line surrounds, with respect to these protrusion portions, an entire circumference of all the protrusion portions and is spaced apart therefrom in plan view.
    Type: Grant
    Filed: July 4, 2014
    Date of Patent: January 22, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenji Hatori, Shuichi Kitamura, Tetsuo Motomiya
  • Publication number: 20180331077
    Abstract: It is an object to provide a pressure-contact power semiconductor device and a power semiconductor core module which are capable of properly reducing their sizes. Each power semiconductor core module includes the following: a plurality of power semiconductor chips including a plurality of self-turn-off semiconductor elements and a plurality of diodes adjacent to each other in plan view; and a plurality of first springs disposed between an upper metal plate and a conductive cover plate. The plurality of self-turn-off semiconductor elements of each power semiconductor core module are arranged along any one of an L-shaped line, a cross-shaped line, and a T-shaped line in plan view.
    Type: Application
    Filed: March 3, 2016
    Publication date: November 15, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshiko TAMADA, Yoshihiro YAMAGUCHI, Seiji OKA, Tetsuo MOTOMIYA
  • Publication number: 20170179265
    Abstract: An object is to provide a technique that enables suppression of oscillation of a gate signal waveform. A power semiconductor device includes a power semiconductor chip, a plurality of collector main terminals and a plurality of emitter main terminals electrically connected to the power semiconductor chip, and a signal line. The plurality of collector main terminals and the plurality of emitter main terminals have protrusion portions which protrude from a disposition surface of the power semiconductor chip, respectively, and the signal line surrounds, with respect to these protrusion portions, an entire circumference of all the protrusion portions and is spaced apart therefrom in plan view.
    Type: Application
    Filed: July 4, 2014
    Publication date: June 22, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji HATORI, Shuichi KITAMURA, Tetsuo MOTOMIYA
  • Patent number: 4438931
    Abstract: A golf club head comprising two or more thin shell sections, for instance a front shell section and a rear shell section, or a face shell section, a top shell section and a body shell section including a bottom section and a side section, are secured together along their edges to form a one-piece shell having a sealed space. A shaft is also secured together with the shell sections when securing these sections. The sealed space is filled with a filler material such as foamed urethane and rubber.
    Type: Grant
    Filed: September 16, 1982
    Date of Patent: March 27, 1984
    Assignee: Kabushiki Kaisha Endo Seisakusho
    Inventor: Tetsuo Motomiya