Patents by Inventor Tetsuo Sato

Tetsuo Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964871
    Abstract: To provide a novel immobilized product in which a carbon material and/or a silicon material is/are immobilized on a base material surface by a chemical bond via a linking group, and a method for producing the same. The immobilized product is an immobilized product in which a carbon material is immobilizing on a surface of a base material, wherein the carbon material is chemically bonded on the surface of the base material via a linking group, and the linking group is at least one selected from the group consisting of a —NH group, a —NH—R1—NH group, a —SO group, a R2 group, a —O—R3—O group, and a R4 group (in which the R1 to R4 each independently represent at least one selected from the group consisting of a chain alkyl group, a cyclic alkyl group, a chain alkenyl group, a cyclic alkenyl group, a chain alkynyl group, etc.).
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: April 23, 2024
    Assignee: STELLA CHEMIFA CORPORATION
    Inventors: Akira Ishimaru, Yoshinori Sato, Hironori Matsushita, Kazutaka Hirano, Tetsuo Nishida
  • Patent number: 11963458
    Abstract: Provided are a magnetic tunnel junction dement suppressing diffusion and penetration of constituent elements between a hard mask film, and a magnetic tunnel junction film and a protection layer, and a method for manufacturing the magnetic tunnel junction element. The magnetic tunnel junction element has a configuration in which a non-magnetic insertion layer (7) including Ta or the like is inserted beneath a hard mask layer (8).
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: April 16, 2024
    Assignee: TOHOKU UNIVERSITY
    Inventors: Koichi Nishioka, Tetsuo Endoh, Shoji Ikeda, Hiroaki Honjo, Hideo Sato, Sadahiko Miura
  • Publication number: 20230411989
    Abstract: A USB power distribution unit according to an embodiment of the present invention has a function of distributing power supplied from a battery to a smartphone connected to a preferred port, and to a mobile battery connected to a non-preferred port. The USB power distribution unit includes a no-idling detection portion, an engine restart detection portion, a PD negotiation portion, and a step-up/down portion, and causes the PD negotiation portion to determine the amount of power supply to the mobile battery when a no-idling state is detected.
    Type: Application
    Filed: May 5, 2023
    Publication date: December 21, 2023
    Applicant: Alps Alpine Co., Ltd.
    Inventors: Fumihito Endo, Tetsuo Sato, Kenji Shimatsu, Mizuki Uchiyama
  • Publication number: 20230140960
    Abstract: A reflectance/transmittance of an optical device disposed at a position through which image light emitted from a liquid crystal display displaying an icon passes is changed according to an anti-glare level to achieve anti-glare of the reflected image. A color of the icon displayed on the liquid crystal display is adjusted such that the higher the transmittance of the optical device is, the lower the lightness is, so that the icon of a similar color is visually recognized regardless of the reflectance/transmittance of the optical device.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 11, 2023
    Applicant: Alps Alpine Co., LTD
    Inventor: Tetsuo Sato
  • Publication number: 20220388746
    Abstract: A freezing packaging film having transparency that produces a color difference (?E) of 30 or less on a surface of contents when subjected to frozen storage at ?20° C. for 2 weeks, the contents being a reagent containing 0.14 mass % of methylene blue and having L* of 55 to 65, a* of 3 to 9 and b* of 45 to 55 in a L*a*b* color system.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 8, 2022
    Applicant: TOPPAN INC.
    Inventors: Wataru YAMAMOTO, Tetsuo SATO, Yoshifumi KUROSE
  • Publication number: 20220367233
    Abstract: A module includes: a substrate having a first surface and a second surface opposed to each other; a component mounted on the first surface; a sealing resin that covers the first surface and the component; a shield film formed to cover an upper surface and a side surface of the sealing resin and a side surface of the substrate; and a resist film formed to cover the second surface. The resist film has a plurality of protrusions.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Tadashi NOMURA, Tetsuo SATO
  • Patent number: 11095133
    Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: August 17, 2021
    Assignee: Renesas Electronics America Inc.
    Inventors: Kota Kano, Tetsuo Sato, Shigeru Maeta
  • Patent number: 11013797
    Abstract: A method for preventing or treating porcine epidemic diarrhea, the method including: administering a live vaccine of a porcine epidemic diarrhea virus and an adjuvant to a pig through oral administration or nasal administration; and administering an inactivated vaccine of the porcine epidemic diarrhea virus and an adjuvant to the pig through intramuscular administration.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: May 25, 2021
    Assignees: NIPPON INSTITUTE FOR BIOLOGICAL SCIENCE, NISSEIKEN CO., LTD.
    Inventors: Tetsuo Sato, Kazuki Oroku, Yoshiyuki Ohshima, Yoshiaki Furuya, Nobuyuki Tsutsumi
  • Patent number: 10985673
    Abstract: One or more embodiments relate to a circuit that can be used to prevent cross conduction in an SMPS including multiple half-bridge modules connected in parallel to a single output inductor and driven by a single pulse width modulation (PWM) signal. According to certain aspects, each high-side driver and low-side driver in a single half-bridge module is synchronized in their switching with corresponding high-side drivers and low-side drivers in other half-bridge modules.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: April 20, 2021
    Assignee: Renesas Electronics America Inc.
    Inventor: Tetsuo Sato
  • Publication number: 20200295583
    Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Applicant: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Kota KANO, Tetsuo SATO, Shigeru MAETA
  • Patent number: 10679986
    Abstract: A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: June 9, 2020
    Assignee: Renesas Electronics America Inc.
    Inventors: Kenji Yoshida, Tetsuo Sato, Shigeru Maeta, Toshio Kimura
  • Patent number: 10673254
    Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.
    Type: Grant
    Filed: July 22, 2017
    Date of Patent: June 2, 2020
    Assignee: Renesas Electronics America Inc.
    Inventors: Kota Kano, Tetsuo Sato, Shigeru Maeta
  • Patent number: 10658855
    Abstract: A transformer less battery charger system. In one embodiment, the battery charger system includes input terminals for receiving an AC voltage, output terminals for receiving terminals of a rechargeable battery pack, and a non-isolated DC-DC converter coupled between the input terminals and the output terminals. A device is also coupled somewhere between the input terminals and the output terminals. The device is configured to selectively and indirectly couple the input terminals to the output terminals. More particularly, the device indirectly couples the input terminals to the output terminals when the rechargeable battery pack terminals are received by the output terminals, and the device indirectly decouples the input terminals from the output terminals when the rechargeable battery pack terminals are separated from the output terminals.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: May 19, 2020
    Assignee: Renesas Electronics America Inc.
    Inventors: Tetsuo Sato, Shigeru Maeta, Toshio Kimura, Atsushi Mitamura, Akira Negishi, Gary S. Jacobson
  • Patent number: 10601403
    Abstract: A super scale switched capacitor for an integrated circuit is disclosed. In one embodiment the super scale switched capacitor circuit includes a capacitor coupled between a first node and a second node. A circuit is also included that contains a first circuit and a second circuit. The first circuit is configured to output a first current, which is a multiple of current effectively flowing through the capacitor from the second node to the first node. The second circuit is configured to input a second current, which is a multiple of current effectively flowing through the capacitor from the first node to the second node.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: March 24, 2020
    Assignee: Renesas Electronics America Inc.
    Inventor: Tetsuo Sato
  • Patent number: 10594149
    Abstract: A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 17, 2020
    Assignee: Renesas Electronics America Inc.
    Inventors: Tetsuo Sato, Tsutomu Kawano, Koji Kashimoto, Takao Hidaka, Tsuyoshi Ota, Ryoji Kato
  • Publication number: 20190348843
    Abstract: The present embodiments relate generally to energy storage and more particularly to methods and apparatuses for performing active cell balancing in rechargeable battery devices. Some embodiments use a flying capacitor architecture for transferring charge between battery cells, and a BEOL process MOSFET for switching the flying capacitor between over-charged and under-charged cells. In other embodiments adapted for use with large power battery systems, a super capacitor or battery cell is used as the charge transfer component instead of a capacitor, and B2B connected MOSFETs are used for the switching components.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 14, 2019
    Inventor: Tetsuo Sato
  • Patent number: 10411698
    Abstract: An apparatus that includes a first device connected to an inductor. The first device includes a first silicon carbide (SiC) junction gate field-effect transistor (JFET), a first SiC schottky barrier diode (SBD) connected to a gate and a drain of the first SiC JFET, and a first silicon (Si) transistor connected to transmit current to a source of the first SiC JFET. An inductor input terminal is connected to the drain of the first SiC JFET.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: September 10, 2019
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Tetsuo Sato, Koichi Yamazaki
  • Publication number: 20190209676
    Abstract: A method for preventing or treating porcine epidemic diarrhea, the method including: administering a live vaccine of a porcine epidemic diarrhea virus and an adjuvant to a pig through oral administration or nasal administration; and administering an inactivated vaccine of the porcine epidemic diarrhea virus and an adjuvant to the pig through intramuscular administration.
    Type: Application
    Filed: July 24, 2017
    Publication date: July 11, 2019
    Inventors: Tetsuo Sato, Kazuki Oroku, Yoshiyuki Ohshima, Yoshiaki Furuya, Nobuyuki Tsutsumi
  • Publication number: 20190113393
    Abstract: A temperature sensor is disclosed. In one embodiment, the temperature sensor takes form in an integrated circuit that includes a plurality of first diodes connected in series between a first node and another node, and a plurality of second diodes connected in series between a second node and the other node. The integrated circuit includes a sub circuit coupled to the first and second nodes. The sub circuit the circuit is configured to generate an output voltage that depends on first and second voltages at the first and second nodes, respectively. The integrated circuit includes a first current source for generating a constant first current, wherein the first current or substantially all of the first current passes through the plurality of first diodes. A second current source is also provided on the integrated circuit for generating a constant second current, wherein the second current or substantially all of the second current passes through the plurality of second diodes.
    Type: Application
    Filed: October 17, 2018
    Publication date: April 18, 2019
    Inventors: Tetsuo SATO, Tsuguyoshi HIROOKA
  • Publication number: 20190103401
    Abstract: A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 4, 2019
    Inventors: Kenji YOSHIDA, Tetsuo SATO, Shigeru MAETA, Toshio KIMURA