Patents by Inventor Tetsuo Shimamura

Tetsuo Shimamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8093683
    Abstract: The invention is directed to providing a technique for increasing a hold voltage of an electrostatic breakdown protection device having a bipolar transistor structure more than conventional and reducing the size of the device. A base region (a P impurity layer) is formed on a front surface of an epitaxial layer, an emitter region (an N+ impurity layer) is formed on the front surface of the P impurity layer, and the epitaxial layer and an N+ impurity layer form a collector region. A connected portion of a base electrode and the base region (the P impurity layer) is located between the end of the base region (the P impurity layer) on a collector electrode side and the emitter region (the N+ impurity layer). It means that the electrodes for the collector, the base and the emitter are formed in this order. The base electrode and the emitter electrode are connected through a wiring (not shown). A P+ isolation layer for dividing the epitaxial layer into a plurality of island regions is further formed.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: January 10, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventor: Tetsuo Shimamura
  • Patent number: 8014114
    Abstract: The invention provides a semiconductor integrated circuit preventing an electrostatic breakdown due to a surge voltage applied to a power supply wiring or a ground wiring and preventing noise interference between a digital circuit and an analog circuit. By providing a first electrostatic breakdown protection diode and a first electrostatic breakdown protection bipolar transistor in a first island region, the first electrostatic breakdown protection diode and the first electrostatic breakdown protection bipolar transistor turn on when a surge voltage is applied to a first ground wiring and protect a digital circuit against an electrostatic breakdown. Furthermore, a first isolation layer is contacted with the first ground wiring in a position that is more adjacent to a first ground pad than the digital circuit, and a second isolation layer is contacted with a second ground wiring in a position that is more adjacent to a second ground pad than an analog circuit.
    Type: Grant
    Filed: November 11, 2008
    Date of Patent: September 6, 2011
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventor: Tetsuo Shimamura
  • Publication number: 20090128971
    Abstract: The invention provides a semiconductor integrated circuit preventing an electrostatic breakdown due to a surge voltage applied to a power supply wiring or a ground wiring and preventing noise interference between a digital circuit and an analog circuit. By providing a first electrostatic breakdown protection diode and a first electrostatic breakdown protection bipolar transistor in a first island region, the first electrostatic breakdown protection diode and the first electrostatic breakdown protection bipolar transistor turn on when a surge voltage is applied to a first ground wiring and protect a digital circuit against an electrostatic breakdown. Furthermore, a first isolation layer is contacted with the first ground wiring in a position that is more adjacent to a first ground pad than the digital circuit, and a second isolation layer is contacted with a second ground wiring in a position that is more adjacent to a second ground pad than an analog circuit.
    Type: Application
    Filed: November 11, 2008
    Publication date: May 21, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventor: Tetsuo SHIMAMURA
  • Publication number: 20090065899
    Abstract: The invention is directed to providing a technique for increasing a hold voltage of an electrostatic breakdown protection device having a bipolar transistor structure more than conventional and reducing the size of the device. A base region (a P impurity layer) is formed on a front surface of an epitaxial layer, an emitter region (an N+ impurity layer) is formed on the front surface of the P impurity layer, and the epitaxial layer and an N+ impurity layer form a collector region. A connected portion of a base electrode and the base region (the P impurity layer) is located between the end of the base region (the P impurity layer) on a collector electrode side and the emitter region (the N+ impurity layer). It means that the electrodes for the collector, the base and the emitter are formed in this order. The base electrode and the emitter electrode are connected through a wiring (not shown). A P+ isolation layer for dividing the epitaxial layer into a plurality of island regions is further formed.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 12, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventor: Tetsuo SHIMAMURA
  • Patent number: 5830414
    Abstract: An air cleaning filter having a carrier made of activated carbon fibers in the form of a web which supports at least one kind of chemical agent selected from the group consisting of (a) an alkali agent selected from a hydroxide or carbonate or an alkali metal, (b) an acidifying agent selected from acid aluminum phosphate or phosphoric acid, and (c) an oxidizing agent composed of two compounds, i.e. active manganese dioxide resulting from an alkali permanganate and an alkali iodate, or which supports combined chemicals of (a) the alkali agent and (c) the oxidizing agent, or combined chemicals of (b) the acidifying agent and (c) the oxidizing agent, wherein one or both surfaces of the web are covered with a nonwoven fabric to make an integrated filter.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: November 3, 1998
    Assignees: Kondoh Industries Limited, Cambridge Filter Japan, Ltd., Unitika Ltd., Nippon Chemical Industrial Co., Ltd.
    Inventors: Tsutomu Ishii, Seiichi Takizawa, Tetsuo Shimamura, Michinori Hashimoto, Shozo Ichimura, Fumio Karibe