Patents by Inventor Tetsuo Uchiyama

Tetsuo Uchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11704218
    Abstract: An information processing apparatus includes a detection unit and first and second classification units. The detection unit detects an event which causes a state of at least one bank constituting dynamic random access memory (DRAM) to transition. The first classification unit classifies the at least one bank state based on the detected event. The second classification unit classifies a DRAM state based on the at least one bank state. Statistical information that is based on the at least one bank or DRAM state is displayed with respect to a predetermined unit time. The at least one bank state and the DRAM state each includes at least one of the following: an operating state, in which data is being transferred, an inoperative state, in which data transfer is not possible due to a predetermined constraint, or a pause state, in which, although there is no constraint, data is not being transferred.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: July 18, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyoshi Ooshima, Tetsuo Uchiyama
  • Publication number: 20200341879
    Abstract: An information processing apparatus includes a detection unit and first and second classification units. The detection unit detects an event which causes a state of at least one bank constituting dynamic random access memory (DRAM) to transition. The first classification unit classifies the at least one bank state based on the detected event. The second classification unit classifies a DRAM state based on the at least one bank state. Statistical information that is based on the at least one bank or DRAM state is displayed with respect to a predetermined unit time. The at least one bank state and the DRAM state each includes at least one of the following: an operating state, in which data is being transferred, an inoperative state, in which data transfer is not possible due to a predetermined constraint, or a pause state, in which, although there is no constraint, data is not being transferred.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 29, 2020
    Inventors: Hiroyoshi Ooshima, Tetsuo Uchiyama
  • Patent number: 8382228
    Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 26, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuo Uchiyama, Hisashi Ishikawa
  • Publication number: 20120007907
    Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuo Uchiyama, Hisashi Ishikawa
  • Patent number: 8080831
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: December 20, 2011
    Assignees: Renesas Electronics Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 8052242
    Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: November 8, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuo Uchiyama, Hisashi Ishikawa
  • Publication number: 20110127594
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: May 21, 2010
    Publication date: June 2, 2011
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20110086976
    Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.
    Type: Application
    Filed: December 6, 2010
    Publication date: April 14, 2011
    Applicants: KITAGAWA INDUSTRIES CO., LTD., SEIKO INSTRUMENTS INC.
    Inventors: Morinobu ENDO, Tetsuo UCHIYAMA, Akio YAMAGUCHI, Teruaki YUOKA, Hiroshi AOYAMA, Kazutoshi TAKEDA, Yoshifumi MAEHARA, Masato TAKENAKA, Koichiro JUJO, Shigeo SUZUKI, Takeshi TOKORO
  • Patent number: 7741656
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: June 22, 2010
    Assignees: Renesas Technology Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20100097156
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 22, 2010
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20100097157
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 22, 2010
    Inventors: Fumitaka NAKAYAMA, Masatoshi MORIKAWA, Yutaka HOSHINO, Tetsuo UCHIYAMA
  • Patent number: 7671381
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: March 2, 2010
    Assignees: Renesas Eastern Japan Semiconductor, Inc., Renesas Technology Corporation
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20090286064
    Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.
    Type: Application
    Filed: July 30, 2009
    Publication date: November 19, 2009
    Applicants: KITAGAWA INDUSTRIES CO., LTD., SEIKO INSTRUMENTS INC.
    Inventors: Morinobu ENDO, Tetsuo UCHIYAMA, Akio YAMAGUCHI, Teruaki YUOKA, Hiroshi AOYAMA, Kazutoshi TAKEDA, Yoshifumi MAEHARA, Masato Takenaka, Koichiro Jujo, Shigeo Suzuki, Takeshi Tokoro
  • Patent number: 7575800
    Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: August 18, 2009
    Assignees: Kitagawa Industries Co., Ltd., Seiko Instruments Inc.
    Inventors: Morinobu Endo, Tetsuo Uchiyama, Akio Yamaguchi, Teruaki Yuoka, Hiroshi Aoyama, Kazutoshi Takeda, Yoshifumi Maehara, Masato Takenaka, Koichiro Jujo, Shigeo Suzuki, Takeshi Tokoro
  • Publication number: 20090167803
    Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.
    Type: Application
    Filed: November 25, 2008
    Publication date: July 2, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuo Uchiyama, Hisashi Ishikawa
  • Publication number: 20090108371
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2008
    Publication date: April 30, 2009
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7479681
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: January 20, 2009
    Assignee: Renesas Eastern Technology Corp.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7306879
    Abstract: A lithium ion secondary cell comprises a positive electrode, a negative electrode, a solid electrolyte and a fiber layer provided in an interface between the solid electrolyte and the positive electrode and/or in an interface between the solid electrolyte and the negative electrode.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: December 11, 2007
    Assignee: Kabushiki Kaisha Ohara
    Inventors: Yasushi Inda, Kazuo Ohara, Tetsuo Uchiyama, Morinobu Endo
  • Publication number: 20070259270
    Abstract: A lithium ion secondary cell comprises a positive electrode, a negative electrode, a solid electrolyte and a fiber layer provided in an interface between the solid electrolyte and the positive electrode and/or in an interface between the solid electrolyte and the negative electrode.
    Type: Application
    Filed: June 6, 2007
    Publication date: November 8, 2007
    Applicant: Kabushiki Kaisha Ohara
    Inventors: Yasushi Inda, Kazuo Ohara, Tetsuo Uchiyama, Morinobu Endo
  • Publication number: 20070194407
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: April 12, 2007
    Publication date: August 23, 2007
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama