Patents by Inventor Tetsuo Uchiyama
Tetsuo Uchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11704218Abstract: An information processing apparatus includes a detection unit and first and second classification units. The detection unit detects an event which causes a state of at least one bank constituting dynamic random access memory (DRAM) to transition. The first classification unit classifies the at least one bank state based on the detected event. The second classification unit classifies a DRAM state based on the at least one bank state. Statistical information that is based on the at least one bank or DRAM state is displayed with respect to a predetermined unit time. The at least one bank state and the DRAM state each includes at least one of the following: an operating state, in which data is being transferred, an inoperative state, in which data transfer is not possible due to a predetermined constraint, or a pause state, in which, although there is no constraint, data is not being transferred.Type: GrantFiled: April 17, 2020Date of Patent: July 18, 2023Assignee: Canon Kabushiki KaishaInventors: Hiroyoshi Ooshima, Tetsuo Uchiyama
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Publication number: 20200341879Abstract: An information processing apparatus includes a detection unit and first and second classification units. The detection unit detects an event which causes a state of at least one bank constituting dynamic random access memory (DRAM) to transition. The first classification unit classifies the at least one bank state based on the detected event. The second classification unit classifies a DRAM state based on the at least one bank state. Statistical information that is based on the at least one bank or DRAM state is displayed with respect to a predetermined unit time. The at least one bank state and the DRAM state each includes at least one of the following: an operating state, in which data is being transferred, an inoperative state, in which data transfer is not possible due to a predetermined constraint, or a pause state, in which, although there is no constraint, data is not being transferred.Type: ApplicationFiled: April 17, 2020Publication date: October 29, 2020Inventors: Hiroyoshi Ooshima, Tetsuo Uchiyama
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Patent number: 8382228Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.Type: GrantFiled: September 23, 2011Date of Patent: February 26, 2013Assignee: Canon Kabushiki KaishaInventors: Tetsuo Uchiyama, Hisashi Ishikawa
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Publication number: 20120007907Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.Type: ApplicationFiled: September 23, 2011Publication date: January 12, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Tetsuo Uchiyama, Hisashi Ishikawa
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Patent number: 8080831Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: GrantFiled: May 21, 2010Date of Patent: December 20, 2011Assignees: Renesas Electronics Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Patent number: 8052242Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.Type: GrantFiled: November 25, 2008Date of Patent: November 8, 2011Assignee: Canon Kabushiki KaishaInventors: Tetsuo Uchiyama, Hisashi Ishikawa
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Publication number: 20110127594Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: ApplicationFiled: May 21, 2010Publication date: June 2, 2011Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Publication number: 20110086976Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.Type: ApplicationFiled: December 6, 2010Publication date: April 14, 2011Applicants: KITAGAWA INDUSTRIES CO., LTD., SEIKO INSTRUMENTS INC.Inventors: Morinobu ENDO, Tetsuo UCHIYAMA, Akio YAMAGUCHI, Teruaki YUOKA, Hiroshi AOYAMA, Kazutoshi TAKEDA, Yoshifumi MAEHARA, Masato TAKENAKA, Koichiro JUJO, Shigeo SUZUKI, Takeshi TOKORO
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Patent number: 7741656Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: GrantFiled: December 22, 2009Date of Patent: June 22, 2010Assignees: Renesas Technology Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Publication number: 20100097156Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: ApplicationFiled: December 22, 2009Publication date: April 22, 2010Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Publication number: 20100097157Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: ApplicationFiled: December 22, 2009Publication date: April 22, 2010Inventors: Fumitaka NAKAYAMA, Masatoshi MORIKAWA, Yutaka HOSHINO, Tetsuo UCHIYAMA
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Patent number: 7671381Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: GrantFiled: December 22, 2008Date of Patent: March 2, 2010Assignees: Renesas Eastern Japan Semiconductor, Inc., Renesas Technology CorporationInventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Publication number: 20090286064Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.Type: ApplicationFiled: July 30, 2009Publication date: November 19, 2009Applicants: KITAGAWA INDUSTRIES CO., LTD., SEIKO INSTRUMENTS INC.Inventors: Morinobu ENDO, Tetsuo UCHIYAMA, Akio YAMAGUCHI, Teruaki YUOKA, Hiroshi AOYAMA, Kazutoshi TAKEDA, Yoshifumi MAEHARA, Masato Takenaka, Koichiro Jujo, Shigeo Suzuki, Takeshi Tokoro
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Patent number: 7575800Abstract: The present invention relates to sliding parts, precision parts and timepieces and electronic equipment using those parts. Sliding parts are composed by a resin in which the degree of orientation of a fibrous filler is higher at the portion serving as the sliding surface than inside the sliding part, and the fibrous filler is oriented along the sliding surface on the sliding surface. Alternatively, precision parts are composed by a resin to which has been added carbon fibers for which a carbon compound is thermally decomposed to carbon in the vapor phase and simultaneously grown directly into fibers simultaneous to this thermal decomposition. Moreover, timepieces and electronic equipment are composed by these sliding parts or these precision parts.Type: GrantFiled: October 31, 2002Date of Patent: August 18, 2009Assignees: Kitagawa Industries Co., Ltd., Seiko Instruments Inc.Inventors: Morinobu Endo, Tetsuo Uchiyama, Akio Yamaguchi, Teruaki Yuoka, Hiroshi Aoyama, Kazutoshi Takeda, Yoshifumi Maehara, Masato Takenaka, Koichiro Jujo, Shigeo Suzuki, Takeshi Tokoro
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Publication number: 20090167803Abstract: An image forming apparatus which forms a halftone image on a print medium by using a multipass process to scan a printhead N (N is an integer of 2 or more) times in a single area on the print medium and form dots by each scan operation includes a pass division unit which sets the print density of a scan operation in the first pass so as to prevent dots from overlapping with each other on the print medium, and sets the print densities of scan operations in the second to Nth passes, a tone reduction unit which generates print data of the respective scan operations in accordance with the print densities set by the pass division unit, and a printhead which prints a halftone image on a print medium on the basis of the print data generated by the tone reduction unit.Type: ApplicationFiled: November 25, 2008Publication date: July 2, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Tetsuo Uchiyama, Hisashi Ishikawa
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Publication number: 20090108371Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: ApplicationFiled: December 22, 2008Publication date: April 30, 2009Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Patent number: 7479681Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: GrantFiled: April 12, 2007Date of Patent: January 20, 2009Assignee: Renesas Eastern Technology Corp.Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Patent number: 7306879Abstract: A lithium ion secondary cell comprises a positive electrode, a negative electrode, a solid electrolyte and a fiber layer provided in an interface between the solid electrolyte and the positive electrode and/or in an interface between the solid electrolyte and the negative electrode.Type: GrantFiled: May 27, 2003Date of Patent: December 11, 2007Assignee: Kabushiki Kaisha OharaInventors: Yasushi Inda, Kazuo Ohara, Tetsuo Uchiyama, Morinobu Endo
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Publication number: 20070259270Abstract: A lithium ion secondary cell comprises a positive electrode, a negative electrode, a solid electrolyte and a fiber layer provided in an interface between the solid electrolyte and the positive electrode and/or in an interface between the solid electrolyte and the negative electrode.Type: ApplicationFiled: June 6, 2007Publication date: November 8, 2007Applicant: Kabushiki Kaisha OharaInventors: Yasushi Inda, Kazuo Ohara, Tetsuo Uchiyama, Morinobu Endo
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Publication number: 20070194407Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.Type: ApplicationFiled: April 12, 2007Publication date: August 23, 2007Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama